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Chapter 1: VC709 Evaluation Board Features
X-Ref Target - Figure 1-25
U1
Dual Use IO
(Analog/Digital)
100Ω
VAUX0P
1 nF
VAUX0N
To
100Ω
Header
J19
100Ω
VAUX8P
1 nF
VAUX8N
100Ω
The VC709 board supports both the internal FPGA sensor measurements and the external
measurement capabilities of the XADC. Internal measurements of the die temperature,
V
provided by a common 1.0 V supply.
Jumper J42 can be used to select either an external differential voltage reference (VREF) or
on-chip voltage reference for the analog-to-digital converter.
For external measurements an XADC header (J19) is provided. This header can be used to
provide analog inputs to the FPGA's dedicated VP/VN channel, and to the
VAUXP[0]/VAUXN[0], VAUXP[8]/VAUXN[8] auxiliary analog input channels.
Simultaneous sampling of Channel 0 and Channel 8 is supported.
A user-provided analog signal multiplexer card can be used to sample additional external
analog inputs using the 4 GPIO pins available on the XADC header as multiplexer address
lines.
Note:
60
FPGA
To J54.3
XADC_VCC
VCCADC
100 nF
Close to
Package Pins
XADC_AGND
GNDADC
XADC_AGND
J42
V REFP
V REFP
100 nF
Close to
Package Pins
V REFN
100Ω
V P
1 nF
V N
100Ω
DXP
DXN
Figure 1-25: XADC Block Diagram
, V
, and V
CCINT
CCAUX
CCBRAM
Figure 1-26
shows the XADC header connections
.VADJ is fixed at 1.8V on the VC709 board.
www.xilinx.com
VCCAUX
Ferrite Bead
J43
XADC_VCC Header J49
1.8V 150 mV max
U10
ADP123
Out
In
Gnd
1 μF
XADC_AGND
U35
To Header J19
REF3012
V REF (1.25V)
Out
In
Gnd
10 μF
Internal
Reference
Ferrite Bead
XADC_AGND
XADC_AGND
Star Grid
Connection
To
Header
J19
are available. The VC709 board V
AV_5V To Header J19
Ferrite Bead
J53
10 μF
100 nF 1 nF
Filter 5V Supply
Locate Components on Board
J54
XADC_VCC
J10
GND
J9
UG887_c1_25_011013
and V
CCINT
CCBRAM
(Figure
1-2, callout 23).
VC709 Evaluation Board
UG887 (v1.0) February 4, 2013
VCC5V0
are
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