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Table 1-6: BPI Flash Memory Connections to the FPGA (Cont'd)
Additional FPGA bitstreams can be stored and used for configuration by setting the Warm
Boot Start Address (WBSTAR) register contained in 7 series FPGAs. More information is
available in the reconfiguration and multiboot section in 7 Series FPGAs Configuration
User Guide (UG470).
The configuration section of
mode.
Figure 1-4
Numonyx PC28F00AG18FE data sheet (www.micron.com).
VC709 Evaluation Board
UG887 (v1.0) February 4, 2013
FPGA (U1) Pin
Net Name
AJ37
FLASH_D3
AK37
FLASH_D4
AL37
FLASH_D5
AN35
FLASH_D6
AP35
FLASH_D7
AM37
FLASH_D8
AG33
FLASH_D9
AH33
FLASH_D10
AK35
FLASH_D11
AL35
FLASH_D12
AJ31
FLASH_D13
AH34
FLASH_D14
AJ35
FLASH_D15
AM34
FLASH_WAIT
BB41
FPGA_FWE_B
BA41
FLASH_OE_B
N10
FPGA_CCLK
AL36
FLASH_CE_B
AY37
FLASH_ADV_B
AG11
FPGA_INIT_B
UG470
shows the linear BPI flash memory on the VC709 board. For more details, see the
www.xilinx.com
BPI Flash Memory (U3)
Pin Number
E4
E5
G5
G6
H7
E1
E3
F3
F4
F5
H5
G7
E7
F7
G8
F8
E6
B4
F6
D4
provides details on the Master BPI configuration
Feature Descriptions
Pin Name
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
WAIT
WE_B
OE_B
CLK
CE_B
ADV_B
RST_B
21
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