Xilinx DK-V7-VC709-G User Manual page 92

Appendix C: Master Constraints File Listing
92
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set_property PACKAGE_PIN N28 [get_ports FMC1_HPC_LA21_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA21_P]
set_property PACKAGE_PIN P28 [get_ports FMC1_HPC_LA22_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA22_N]
set_property PACKAGE_PIN R28 [get_ports FMC1_HPC_LA22_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA22_P]
set_property PACKAGE_PIN N31 [get_ports FMC1_HPC_LA23_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA23_N]
set_property PACKAGE_PIN P30 [get_ports FMC1_HPC_LA23_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA23_P]
set_property PACKAGE_PIN P31 [get_ports FMC1_HPC_LA24_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA24_N]
set_property PACKAGE_PIN R30 [get_ports FMC1_HPC_LA24_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA24_P]
set_property PACKAGE_PIN K30 [get_ports FMC1_HPC_LA25_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA25_N]
set_property PACKAGE_PIN K29 [get_ports FMC1_HPC_LA25_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA25_P]
set_property PACKAGE_PIN H30 [get_ports FMC1_HPC_LA26_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA26_N]
set_property PACKAGE_PIN J30 [get_ports FMC1_HPC_LA26_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA26_P]
set_property PACKAGE_PIN H31 [get_ports FMC1_HPC_LA27_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA27_N]
set_property PACKAGE_PIN J31 [get_ports FMC1_HPC_LA27_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA27_P]
set_property PACKAGE_PIN L30 [get_ports FMC1_HPC_LA28_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA28_N]
set_property PACKAGE_PIN L29 [get_ports FMC1_HPC_LA28_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA28_P]
set_property PACKAGE_PIN T30 [get_ports FMC1_HPC_LA29_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA29_N]
set_property PACKAGE_PIN T29 [get_ports FMC1_HPC_LA29_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA29_P]
set_property PACKAGE_PIN V31 [get_ports FMC1_HPC_LA30_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA30_N]
set_property PACKAGE_PIN V30 [get_ports FMC1_HPC_LA30_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA30_P]
set_property PACKAGE_PIN M29 [get_ports FMC1_HPC_LA31_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA31_N]
set_property PACKAGE_PIN M28 [get_ports FMC1_HPC_LA31_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA31_P]
set_property PACKAGE_PIN U29 [get_ports FMC1_HPC_LA32_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA32_N]
set_property PACKAGE_PIN V29 [get_ports FMC1_HPC_LA32_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA32_P]
set_property PACKAGE_PIN T31 [get_ports FMC1_HPC_LA33_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA33_N]
set_property PACKAGE_PIN U31 [get_ports FMC1_HPC_LA33_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA33_P]
#GPIO DIP SW
set_property PACKAGE_PIN AV30 [get_ports GPIO_DIP_SW0]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW0]
set_property PACKAGE_PIN AY33 [get_ports GPIO_DIP_SW1]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW1]
set_property PACKAGE_PIN BA31 [get_ports GPIO_DIP_SW2]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW2]
set_property PACKAGE_PIN BA32 [get_ports GPIO_DIP_SW3]
www.xilinx.com VC709 Evaluation Board
UG887 (v1.4) December 4, 2014