Xilinx DK-V7-VC709-G User Manual page 11

Table 1-1: VC709 Board Component Descriptions (Cont'd)
Reference
Callout
Designator
7 J31, J32 User SMA clock
8 J25, J26 GTH transceiver SMA reference clock
9 U24 Jitter-attenuated clock (back side of board)
10 U1 GTH transceiver Quad 111–Quad 119
11 P1 PCI Express connector
P2–P5 4 X SFP/SFP+ module connector (I²C 0x50)
12
13 USB-to-UART bridge with mini-B USB
U44, J17
connector
2
14 U52 I C bus switch (I²C 0x74) (back side of board)
2
15 U14 I C bus switch (I²C 0x75) (back side of board)
16 DS2–DS9 User LEDs, Green
17 SW3–SW7 User pushbuttons, active-High
18 SW2 User DIP switch, active-High
19 SW8, SW9 CPU RESET, FPGA PROG pushbuttons
20 Configuration mode/upper linear flash
SW11
address DIP switch
21 SW12 Power on/off slide switch
22 J35 FMC HPC connector
23 J19 Xilinx XADC header
24 DS1 INIT LED, dual color Red/Green
25 DS10, DS14,
Power ON and Power GOOD LEDs
DS16–DS18
Power management system (front and back
26
Various
side of board)
27 Memory clock, 233.33 MHz, LVDS (back side
U13
of board)
J35 2 x 5 shrouded PMBus connector
28
29 J18 12V power input 2 x 3 connector
Notes:
1. Jumper header locations are identified in
VC709 Evaluation Board
UG887 (v1.4) December 4, 2014
Component Description
Appendix A, Default Switch and Jumper
www.xilinx.com
Feature Descriptions
Notes
Rosenberger 32K10K-400L5
Rosenberger 32K10K-400L5
Silicon Labs SI5324C-C-GM
Embedded within FPGA U1
8-lane card edge connector
Molex 74441-0010
Silicon Labs CP2103GM
TI PCA9548ARGER
TI PCA9546ARGVR
Lumex SML-LX0603GW
E-Switch TL3301EP100QG
8-pole C and K SDA08H1SBD
E-Switch TL3301EP100QG
5-pole C and K SDA05H1IBD
C and K 1201M2S3AQE2
Samtec ASP_134486_01
2 x 10 0.1-inch male header
Avago HSMF-C155
Lumex SML-LX0603GW
TI UCD9248PFC in conjunction
with various regulators
SiTime
SIT9122AC-2D3-25E233.333333
Assman HW10G-0202
Molex 39-30-1060
Settings.
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Schematic
0381499
Page
Number
3
30
4
30, 36–38
35
31–35
6
29
29
25
25
25
25, 7
7
46
18–21
27
38
38
45–56
3
46
46
11