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Probes
Comparators
Acquisition and Memory Controller IC
16962A Logic Analyzer Service Guide
The 16962A logic analyzer card contains 4 probe pods. Each
pod is comprised of two cables and contains 16 differential
data channels, a differential clock channel, a user supplied
threshold voltage, two serial I2C programming lines for
configuring analysis probes, +5 V for powering analysis
probes, a probe identification line, and 50 ground signals.
Each cable has a 90- pin probe cable connector.
The pods provide +5 Vdc ±5% auxiliary power to each 90- pin
probe cable connector. Each connector can deliver up to
300 mA with a maximum of 1.0 A total from the analyzer
card. A current limiting circuit protects the +5 V cable
power from current overload. The VCC_Enable signal is used
to control power to an analysis probe. This allows analysis
probes to be connected without powering down the analyzer
and yet insures a clean +5 Vdc ramp to the analysis probe
when power is applied by software.
A variety of differential and single- ended probes can be
connected to the logic analyzer cables. Each probe type is
uniquely identified by a different resistor value connected
between its probe ID signal and ground.
The comparators are differential input/differential output
devices that interpret incoming data and clock signals as
either high or low. A threshold voltage provided by an
internal digital- to- analog- converter (DAC) is coupled to the
negative side of the differential signal through a precision
resistor. Alternatively, this voltage can be provided to the
data channels by a user supplied threshold line in the probe
cables. There are separate internal DAC driven thresholds
for each data and clock channel.
In order to achieve performance, an extensive calibration is
performed on each comparator when the board is
manufactured and the results of this calibration are stored
as Calibration Constants in non- volatile memory on the logic
analyzer board. These constants are loaded into the
comparators at power on.
The Acquisition IC processes 64 channels of data and 4
channels of clock information. The Acquisition IC performs
data sampling, sequencing, store qualification, pattern
8
Theory of Operation
97
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