Independent Memory Mode Installation Order - Lenovo ThinkSystem SR860 V3 User Manual

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Table 13. Memory slot and channel identification (continued)
0
Slot No.
32
DIMM No.
Processor
Controller
CH1
Channel
0
Slot No.
33
DIMM No.
Processor
Controller
CH1
Channel
0
Slot No.
49
DIMM No.
Memory module installation guideline
• At least one DIMM is required for each processor. Install at least eight DIMMs per processor for good
performance.
• When you replace a DIMM, the server provides automatic DIMM enablement capability without requiring
you to use the Setup Utility to enable the new DIMM manually.

Independent memory mode installation order

Independent memory mode provides the highest level of memory performance, but lacks failover protection.
The DIMM installation order for independent memory mode varies based on the number of processors and
memory modules installed in the server.
Follow the rules below when installing memory modules in independent mode:
• There should be at least one DDR5 DIMM per processor.
• All DDR5 memory modules must operate at the same speed in the same system.
• Memory population must be identical between processors.
• Memory modules from different vendors are supported.
• In each memory channel, populate the slot farthest from the processor (slot 0) first.
• All memory modules must be DDR5 memory modules.
• x8 memory modules and x4 memory modules cannot be mixed in a system.
• All memory modules to be installed must be of the same type.
– Value RDIMM cannot be mixed with non-value RDIMMs in a system.
– 3DS RDIMM cannot be mixed with non-3DS RDIMMs in a system.
• All memory modules in a system must have the same number of ranks.
With two processors
The following table shows the sequence of populating memory modules for independent mode when two
processors are installed.
1
0
1
0
31
30
29
28
iMC3
CH0
CH1
1
0
1
0
34
35
36
37
iMC3
CH0
CH1
1
0
1
0
50
51
52
53
1
0
1
1
27
26
25
24
CPU 3
iMC2
CH0
CH0
1
0
1
1
38
39
40
41
CPU 4
iMC2
CH0
CH0
1
0
1
1
54
55
56
57
Chapter 5
0
1
0
1
0
23
22
21
20
19
iMC0
iMC1
CH1
CH0
0
1
0
1
0
42
43
44
45
46
iMC0
iMC1
CH1
CH0
0
1
0
1
0
58
59
60
61
62
.
Hardware replacement procedures
1
0
18
17
CH1
1
0
47
48
CH1
1
0
63
64
49

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