Device Configuration; Configuration Signals; Fpga And Hps Configuration Pins - Enclustra Mercury SA1 SoC Module User Manual

3 Device Configuration

3.1

Configuration Signals

Table 30 describes the most important configuration pins.
Signal Name
FLASH_CLK
FLASH_CS#
FLASH_DI
FLASH_DO
FLASH_IO2
FLASH_IO3
HPS_RST#
HPS_POR#
FPGA_CONFDONE
BOOT_MODE0
BOOT_MODE1
Table 30: FPGA and HPS Configuration Pins
Warning!
All configuration signals except for BOOT_MODE must be high impedance as soon as the device is
released from reset. Violating this rule may damage the equipped SoC device, as well as other devices
on the Mercury SA1 SoC module.
D-0000-402-002
FPGA Pin HPS Pin
DCLK GPIO 34
CSO# GPIO 33
ASDATA0_ASDO GPIO 29
ASDATA1 GPIO 30
ASDATA2 GPIO 31
ASDATA3 GPIO 32
- HPS_RST#
CONFIG# HPS_POR#
CONFDONE -
- GPIO 40
- GPIO 42
QSPI Module
Flash Connector
Pin Pin
CLK A-118
CS# A-116
SI/IO0 A-114
SO/IO1 A-122
IO2 -
IO3 -
- A-124
RESET# A-132
- A-130
- A-126
- A-112
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Comments
4.7 k pull-up to
VCC_CFG_HPS_B3A_B8A
Depending on the boot
mode
4.7 k pull-up to
VCC_CFG_HPS_B3A_B8A
9.4 k pull-up to
VCC_CFG_HPS_B3A_B8A
-
-
4.7 k pull-up to
VCC_CFG_HPS_B3A_B8A
4.7 k pull-up to
VCC_CFG_HPS_B3A_B8A
1 k pull-up to
VCC_CFG_HPS_B3A_B8A
4.7 k pull-up to
VCC_CFG_HPS_B3A_B8A
4.7 k pull-up to
VCC_CFG_HPS_B3A_B8A
Version 06, 16.02.2021