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Mercury ZX1 SoC Module
Purpose
The purpose of this document is to present the characteristics of Mercury ZX1 SoC module to the user, and
to provide the user with a comprehensive guide to understanding and using the Mercury ZX1 SoC module.
Summary
This document first gives an overview of the Mercury ZX1 SoC module followed by a detailed description of
its features and configuration options. In addition, references to other useful documents are included.
Product Information
Product
Document Information
Reference / Version / Date
Approval Information
Written by
Verified by
Approved by
User Manual
Code
ME-ZX1
Reference
D-0000-403-002
Name
DIUN
GLAC
DIUN
Enclustra GmbH – Räffelstrasse 28 – CH-8045 Zürich – Switzerland
Name
Mercury ZX1 SoC Module
Version
05
Position
Design Engineer
Design Expert
Manager, BU SP
Phone +41 43 343 39 43 – www.enclustra.com
Date
25.07.2019
Date
05.09.2016
06.10.2016
25.07.2019

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Summary of Contents for Enclustra Mercury ZX1

  • Page 1 User Manual Purpose The purpose of this document is to present the characteristics of Mercury ZX1 SoC module to the user, and to provide the user with a comprehensive guide to understanding and using the Mercury ZX1 SoC module. Summary This document first gives an overview of the Mercury ZX1 SoC module followed by a detailed description of its features and configuration options.
  • Page 2 Unauthorized duplication of this document, in whole or in part, by any means is prohibited without the prior written permission of Enclustra GmbH, Switzerland. Although Enclustra GmbH believes that the information included in this publication is correct as of the date of publication, Enclustra GmbH reserves the right to make changes at any time without notice.
  • Page 3: Table Of Contents

    Enclustra Build Environment ........
  • Page 4 3.11 Enclustra Module Configuration Tool ........46 I2C Communication Overview .
  • Page 5 Signal Description ..........47 I2C Address Map .
  • Page 6: Overview

    The Enclustra Build Environment [14] is available for the Mercury ZX1 SoC module. This build system allows the user to quickly set up and run Linux on any Enclustra SoC module. It allows the user to choose the desired target and download all the required binaries, such as bitstream and FSBL (First Stage Boot Loader).
  • Page 7: Electrostatic Discharge

    Warning! It is possible to mount the Mercury ZX1 SoC module the wrong way round on the base board - always check that the mounting holes on the base board are aligned with the mounting holes of the Mercury ZX1 SoC module.
  • Page 8: Deliverables

    Enclustra Build Environment The Enclustra Build Environment (EBE) [14] enables the user to quickly set up and run Linux on any Enclustra SoC module or system board. It allows the user to choose the desired target, and download all the required binaries, such as bitstream and FSBL.
  • Page 9: Xilinx Tool Support

    Xilinx Tool Support The SoC devices equipped on the Mercury ZX1 SoC module are supported by the Vivado HL WebPACK Edition or by the Vivado HL Design Edition software, depending on the device’s density. Table 1 presents the correspondence between devices and tools.
  • Page 10: Module Description

    Figure 1: Hardware Block Diagram The main component of the Mercury ZX1 SoC module is the Xilinx Zynq-7000 SoC device. Most of its I/O pins are connected to the Mercury module connector, making up to 150 regular user I/Os available to the user.
  • Page 11: Module Configuration And Product Codes

    Figure 2: Product Code Fields Please note that for the first revision modules or early access modules, the product code may not respect entirely this naming convention. Please contact Enclustra for details on this aspect. Article Numbers and Article Codes Every module is uniquely labeled, showing the article number and serial number.
  • Page 12: Module Label

    The correspondence between article number and article code is shown in Table 3. The article code repre- sents the product code, followed by the revision; the R suffix and number represent the revision number. The revision changes and product known issues are described in the Mercury ZX1 SoC Module Known Issues and Changes document [6].
  • Page 13: Top And Bottom Views

    Top and Bottom Views 2.4.1 Top View Figure 4: Module Top View 2.4.2 Bottom View Figure 5: Module Bottom View Please note that depending on the hardware revision and configuration, the module may look slightly dif- ferent than shown in this document. D-0000-403-002 13 / 56 Version 05, 25.07.2019...
  • Page 14: Top And Bottom Assembly Drawings

    Top and Bottom Assembly Drawings 2.5.1 Top Assembly Drawing Figure 6: Module Top Assembly Drawing 2.5.2 Bottom Assembly Drawing Figure 7: Module Bottom Assembly Drawing Please note that depending on the hardware revision and configuration, the module may look slightly dif- ferent than shown in this document.
  • Page 15: Module Footprint

    Figure 8: Module Footprint - Top View Warning! It is possible to mount the Mercury ZX1 SoC module the wrong way round on the base board - always check that the mounting holes on the base board are aligned with the mounting holes of the Mercury ZX1 SoC module.
  • Page 16: Mechanical Data

    Mechanical Data Table 4 describes the mechanical characteristics of the Mercury ZX1 SoC module. A 3D model (PDF) and a STEP 3D model are available [8], [9]. Symbol Value Size 54 mm Component height top 3.0 mm Component height bottom 1.45 mm...
  • Page 17: User I/O

    User I/O 2.9.1 Pinout Information on the Mercury ZX1 SoC module pinout can be found in the Enclustra Mercury Master Pinout [11], and in the additional document Enclustra Module Pin Connection Guidelines [10]. Warning! Please note that the pin types on the schematics symbol of the module connector and in the Master Pinout document are for reference only.
  • Page 18: I/O Pin Exceptions

    The I/O pin exceptions are pins with special functions or restrictions. I/O Pins with Different Functions Depending on the Equipped SoC Device On the Mercury ZX1 SoC modules equipped with bigger SoC devices (XC7Z035/XC7Z045) there are eight MGT transceiver lines and four differential clock inputs available.
  • Page 19: Differential I/Os

    The information regarding the length of the signal lines from the SoC device to the module connector is available in Mercury ZX1 SoC Module IO Net Length Excel Sheet [3]. This enables the user to match the total length of the differential pairs on the base board if required by the application.
  • Page 20: Vref Usage

    SoC device, as well as other devices on the Mercury ZX1 SoC module. Do not leave a VREF pin floating when the used I/O standard requires a reference voltage, as this may damage the equipped SoC device, as well as other devices on the Mercury ZX1 SoC module. 2.9.6...
  • Page 21 Use only VCC_IO voltages compliant with the equipped SoC device; any other voltages may damage the equipped SoC device, as well as other devices on the Mercury ZX1 SoC module. Do not leave a VCC_IO pin floating, as this may damage the equipped SoC device, as well as other devices on the Mercury ZX1 SoC module.
  • Page 22: Signal Terminations

    GPIOs; the suggested functions below are for reference only - always verify your MIO pinout with the Xilinx device handbook. Table 11 gives an overview over the MIO pin connections on the Mercury ZX1 SoC module. Only the pins marked with “user functionality” are available on the module connector.
  • Page 23: Multi-Gigabit Transceiver (Mgt)

    2.10 Multi-Gigabit Transceiver (MGT) On the Mercury ZX1 SoC modules equipped with bigger SoC devices, there are eight Multi-Gigabit transceivers and four reference input clock differential pairs available on the module connector B. On the Mercury ZX1 SoC modules equipped with smaller SoC devices, there are only four Multi-Gigabit transceivers and two reference input clock differential pairs available.
  • Page 24: Power

    Power Generation Overview The Mercury ZX1 SoC module uses a 5 - 15 V DC power input for generating the on-board supply voltages (1.0 V, 1.2 V, 1.35 V/1.5 V, 1.55 V, 1.8 V, 2.0 V, 2.5 V, 2.9 V and 3.3 V). Some of these voltages (1.8 V, 2.5 V, 3.3 V) are accessible on the module connector.
  • Page 25: Power Enable/Power Good

    Power Enable/Power Good The Mercury ZX1 SoC module provides a power enable input on the module connector. This input may be used to shut down the DC/DC converters for 1.0 V, 1.2 V, 1.35 V/1.5 V, 1.8 V, and 2.5 V. The 3.3 V supply is always active.
  • Page 26: Voltage Supply Inputs

    Figure 10. 2.11.3 Voltage Supply Inputs Table 15 describes the power supply inputs on the Mercury ZX1 SoC module. The VCC voltages used as supplies for the I/O banks are described in Section 2.9.6. Pin Name Module Connector Pins...
  • Page 27: Power Consumption

    SoC is adequately cooled. Table 17 lists the heat sink and thermal pad part numbers that are compatible with the Mercury ZX1 SoC module. Details on these parts and additional information that may assist in selecting a suitable heat sink for the Mercury ZX1 SoC module can be found in the Enclustra Modules Heat Sink Application Note [17].
  • Page 28: Clock Generation

    Please note that PS_POR# is automatically asserted if PWR_GOOD is low. 2.14 LEDs There are four active-low LEDs on the Mercury ZX1 SoC module. LEDs 0-2 are connected to the FPGA logic and LED3 is connected to the pin MIO15 of the PS. D-0000-403-002 28 / 56 Version 05, 25.07.2019...
  • Page 29: Ddr3 Sdram (Ps)

    DDR3 SDRAM (PS) There are two DDR3 SDRAM channels on the Mercury ZX1 SoC module: one attached directly to the PS side (which is available only as a shared resource to the PL side) and one attached directly to the PL side.
  • Page 30: Signal Description

    2.15.2 Signal Description Please refer to the Mercury ZX1 SoC Module FPGA Pinout Excel Sheet [4] for detailed information on the DDR3 SDRAM connections. 2.15.3 Termination Warning! No external termination is implemented on the Mercury ZX1 SoC module. Therefore, it is strongly recommended to enable the on-die termination (ODT) feature of the DDR3 SDRAM device.
  • Page 31: Ddr3 Low Voltage Operation

    2.16 DDR3 SDRAM (PL) The DDR3 SDRAM connected to the PL on the Mercury ZX1 SoC module is operated at 1.35 V (low power mode) or at 1.5 V, depending on a selection signal. The DDR bus width is 16-bit.
  • Page 32: Signal Description

    FPGA pins (due to the limited number of FPGA I/Os). 2.16.2 Signal Description Please refer to the Mercury ZX1 SoC Module FPGA Pinout Excel Sheet [4] for detailed information on the DDR3 SDRAM connections. 2.16.3...
  • Page 33: Ddr3 Low Voltage Operation

    Table 26 describes the memory availability and configuration on the Mercury ZX1 SoC module. As there is one QSPI flash chip equipped on the Mercury ZX1 SoC module, type “single” must be selected when programming the flash from Vivado tools.
  • Page 34: Signal Description

    QSPI flash from an external master. Note that MIO pins 2-6 pins are shared between NAND flash and QSPI flash on the Mercury ZX1 SoC mod- ule, therefore only of the two memories may be used at once. However, it is possible to switch between them at runtime.
  • Page 35: Nand Flash

    Please refer to the NAND flash memory device datasheet to extract the required parameter values. Refer- ence values to be used in Vivado are given in Table 28. The indicated parameter values may be used for booting from NAND flash memory on the Mercury ZX1 SoC module.
  • Page 36: Gigabit Ethernet

    Please note that Xilinx recommends operation at 1.8 V/2.5 V for the RGMII interface for the MIO pins [18]. Enclustra tests have shown that the RGMII is functional with a 3.3 V I/O voltage on the MIO pins, as long as the I/O voltage configured in Vivado matches the applied I/O voltage.
  • Page 37: External Connectivity

    Table 30: Gigabit Ethernet Signal Description 2.20.3 External Connectivity The Ethernet signal lines can be connected directly to the magnetics. Please refer to the Enclustra Module Pin Connection Guidelines [10] for details regarding the connection of Ethernet signals. 2.20.4 MDIO Address The MDIO address assigned to the Gigabit Ethernet PHY is 3.
  • Page 38: Dual Fast Ethernet

    I/Os via MII interface. On Mercury ZX1 SoC modules revision 1 the Fast Ethernet ports are not enabled when DDR3 SDRAM is operated in low power mode. This is because the Ethernet ports are fed by the same supply as the DDR3 memory and require a voltage of 1.5 V to work properly.
  • Page 39: External Connectivity

    MHz. 2.22 USB 2.0 The Mercury ZX1 SoC module has an on-board USB 2.0 PHY connected to the SoC device. The USB interface can be configured for USB host, USB device and USB On-The-Go (host and device capable) operations. 2.22.1 USB PHY Type Table 34 describes the equipped USB PHY device type on the Mercury ZX1 SoC module.
  • Page 40: Real-Time Clock (Rtc)

    A real-time clock is connected to the I2C bus. The RTC features a battery-buffered 128 bytes user SRAM and a temperature sensor. See Section 4 for details on the I2C bus on the Mercury ZX1 SoC module. VBAT pin of the RTC is connected to VCC_BAT on the module connector, and can be connected directly to a 3 V battery.
  • Page 41: Device Configuration

    3 Device Configuration Configuration Signals The PS of the SoC needs to be configured before the FPGA logic can be used. Xilinx Zynq devices need special boot images to boot from QSPI flash or SD card. For more information, please refer to the Xilinx Zynq-7000: Concepts, Tools, and Techniques document [20].
  • Page 42: Pull-Up During Configuration

    All configuration signals except for BOOT_MODE must be high impedance as soon as the device is released from reset. Violating this rule may damage the equipped SoC device, as well as other devices on the Mercury ZX1 SoC module. Pull-Up During Configuration The Pull-Up During Configuration signal (PUDC) is pulled to ground via a 1 k resistor during FPGA config- uration, and connected to an FPGA signal after this process is done.
  • Page 43: Boot Mode

    For details on the PUDC signal please refer to the Zynq-7000 All Programmable SoC Technical Reference Manual [18]. Boot Mode The boot mode can be selected via two signals available on the module connector. Table 38 describes the available boot modes on the Mercury ZX1 SoC module. BOOT_MODE1 BOOT_MODE0 Description...
  • Page 44: Jtag On Module Connector

    It is recommended to add 22 series termination resistors between the module and the JTAG header, close to the source. Please refer to the Enclustra Module Pin Connection Guidelines for details on JTAG interface. QSPI Boot Mode In the QSPI boot mode, the PS boots from the QSPI flash located on the module. The flash device is con- nected to the PS MIO pins 1-6.
  • Page 45: Qspi Flash Programming Via Jtag

    When programming the NAND flash in u-boot, the user must make sure that the NAND controller is en- abled; the u-boot available in the Enclustra Linux build environment includes a built-in command to switch the current configuration to use NAND flash as storage:...
  • Page 46: Enclustra Module Configuration Tool

    3.11 Enclustra Module Configuration Tool In combination with an Enclustra base board, the QSPI flash can be programmed using the Enclustra Module Configuration Tool (MCT) [16]. Please note that the Xilinx Zynq devices do not support slave serial configuration, therefore only flash pro- gramming is supported by the Enclustra MCT for the Mercury ZX1 SoC module.
  • Page 47: I2C Communication

    4 I2C Communication Overview The I2C bus on the Mercury ZX1 SoC module is connected to the SoC device, EEPROM and RTC, and is available on the module connector. This allows external devices to read the module type and to connect more devices to the I2C bus.
  • Page 48: Secure Eeprom

    An example demonstrating how to read the module information from the EEPROM memory is included in the Mercury ZX1 SoC module reference design. Warning! The secure EEPROM is for Enclustra use only. Any attempt to write data to the secure EEPROM causes the warranty to be rendered void. 4.4.1...
  • Page 49: Product Information

    Module Product Family Reserved Revision Product Information Mercury ZX1 SoC module 0x0327 0x[XX] 0x[YY] 0x0327 [XX][YY] Table 43: Product Information Module Configuration Addr. Bits Comment Min. Value Max. Value Comment See SoC type SoC type 0x08 table (Table 45) SoC device speed grade...
  • Page 50 MAC addresses; only the lower one is stored in the EEPROM. If all three Ethernet interfaces shall be used, the user must provide the third MAC address; the first two addresses are already provided by Enclustra. D-0000-403-002 50 / 56 Version 05, 25.07.2019...
  • Page 51: Operating Conditions

    5 Operating Conditions Absolute Maximum Ratings Table 46 indicates the absolute maximum ratings for Mercury ZX1 SoC module. The values given are for reference only; for details please refer to the Zynq-7000 DC and AC Switching Characteristics Datasheet [23]. Symbol...
  • Page 52: Recommended Operating Conditions

    Recommended Operating Conditions Table 47 indicates the recommended operating conditions for Mercury ZX1 SoC module. The values given are for reference only; for details please refer to the Zynq-7000 DC and AC Switching Characteristics Datasheet [23]. Symbol Description Rating Unit...
  • Page 53: Ordering And Support

    6 Ordering and Support Ordering Please use the Enclustra online request/order form for ordering or requesting information: http://www.enclustra.com/en/order/ Support Please follow the instructions on the Enclustra online support site: http://www.enclustra.com/en/support/ D-0000-403-002 53 / 56 Version 05, 25.07.2019...
  • Page 54 MIO Pins Connections Overview ........23 MGT Switching Characteristics on the Mercury ZX1 SoC module ....24 Generated Power Supplies .
  • Page 55 Boot Modes ..........43 JTAG Interface .
  • Page 56 [1] Enclustra General Business Conditions http://www.enclustra.com/en/products/gbc/ [2] Mercury ZX1 SoC Module Reference Design Ask Enclustra for details [3] Mercury ZX1 SoC Module IO Net Length Excel Sheet Ask Enclustra for details [4] Mercury ZX1 SoC Module FPGA Pinout Excel Sheet Ask Enclustra for details...

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