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Mercury+ XU1
Enclustra Mercury+ XU1 MPSoC Module Manuals
Manuals and User Guides for Enclustra Mercury+ XU1 MPSoC Module. We have
2
Enclustra Mercury+ XU1 MPSoC Module manuals available for free PDF download: User Manual
Enclustra Mercury+ XU1 User Manual (68 pages)
SoC Module
Brand:
Enclustra
| Category:
Control Unit
| Size: 4 MB
Table of Contents
Table of Contents
4
1 Overview
7
Disposal and WEEE
7
General
7
Introduction
7
Rohs
7
Warranty
7
Electromagnetic Compatibility
8
Electrostatic Discharge
8
Features
8
Safety Recommendations and Warnings
8
Deliverables
9
Enclustra Build Environment
9
Reference Design
9
Accessories
10
Enclustra Heat Sink
10
Mercury+ PE1 Base Board
10
Mercury+ PE3 Base Board
10
Mercury+ ST1 Base Board
10
Petalinux BSP
10
Xilinx Tool Support
10
Listoffigures
11
Listoftables
13
Block Diagram
11
Hardware Block Diagram
11
Module Description
11
Module Configuration and Product Models
12
Product Model Fields
13
Standard Module Configurations
13
Module Label
14
Numbers and Product Models
14
Numbers and Part Names
16
Bottom View
17
Module Bottom View
17
Module Top View
17
Top and Bottom Views
17
Top View
17
Bottom Assembly Drawing
18
Module Bottom Assembly Drawing
18
Module Top Assembly Drawing
18
Top and Bottom Assembly Drawings
18
Top Assembly Drawing
18
Module Footprint - Top View and Side View
19
Module Footprint and Mechanical Data
19
Mechanical Data
20
Module Connector
20
Module Connector Types
20
Pin Numbering for the Module Connector
21
Pinout
21
User I/O
21
I/O Pin Exceptions
22
I/O Pin Exceptions - PERST
22
User I/Os
22
Assembly Options for MGT REFCLK Signals
24
Assembly Options for MGT TX/RX Signals
24
Assembly Options for MGT Signals and Migration Guidelines
25
Differential I/Os
25
I/O Banks
25
VCC_IO Usage
26
Multiplexed I/O ﴾MIO﴿ Pins
28
Signal Terminations
28
MIO Pins Connections Overview
29
Analog Inputs
30
Multi-Gigabit Transceiver ﴾MGT
30
MGT Pairs
31
Power
32
Power Generation Overview
32
Generated Power Supplies
33
Module Power Status and Control Pins
34
Power Converter Synchronization
34
Power Enable/Power Good
34
Voltage Supply Inputs
35
Voltage Supply Outputs
35
Heat Dissipation
36
Power Consumption
36
Voltage Supply Outputs
36
Heat Sink Type
37
Voltage Monitoring
37
Voltage Monitoring Outputs
37
Clock Generation
38
Module Clock Resources
38
Reset
38
Leds
39
Reset Resources
39
User Leds
39
Ddr4 Sdram
40
DDR4 SDRAM Characteristics
40
Signal Description
40
Status Leds
40
DDR4 SDRAM Parameters
41
Parameters
41
Termination
41
Configuration
42
QSPI Flash
42
QSPI Flash Characteristics
42
Signal Description
42
Dual Gigabit Ethernet
43
Emmc Flash
43
Emmc Flash Characteristics
43
Ethernet PHY Characteristics
43
Gigabit Ethernet Phys Characteristics
43
SD Card
43
Signal Description
43
External Connectivity
44
MDIO Address
44
Signal Description
44
USB1/ETH1 Selection
44
Gigabit Ethernet Phys Configuration - Bootstraps
45
Gigabit Ethernet Phys Configuration - RGMII Delays
45
PHY Configuration
45
RGMII Delays Configuration
45
Signal Description
46
Usb 2.0
46
USB 2.0 PHY Characteristics
46
Usb 3.0
46
USB PHY Characteristics
46
Display Port
47
Real-Time Clock ﴾RTC
47
USB 3.0 Implementation Example
47
Debug Connector
48
Debug Connector Type
48
EEPROM Characteristics
48
Secure EEPROM
48
Debug Connector Interface - Revision 1 and 2 Modules
50
Configuration Signals
51
Device Configuration
51
Module Connector C Detection
51
Mpsoc Configuration Pins
51
Power-On Reset Delay Override
52
Pull-Up During Configuration
52
Boot Mode
53
Boot Modes
53
External Connectivity
54
Jtag
54
JTAG Interface - PL and PS Access and Debug
54
JTAG on Module Connector
54
PJTAG on Debug Connector
54
JTAG Boot Mode
55
Emmc Boot Mode
56
Emmc Flash Programming
56
QSPI Boot Mode
56
QSPI Flash Programming Via JTAG
56
SD Card Boot Mode
56
SD Card Boot Modes
56
QSPI Flash Programming from an External SPI Master
57
QSPI Flash Programming from an External SPI Master - Signal Diagrams
57
QSPI Flash Signals for External Access
57
Enclustra Module Configuration Tool
58
I2C Address Map
59
I2C Communication
59
I2C Signal Description
59
Overview
59
Signal Description
59
EEPROM Sector 0 Memory Map
60
I2C Addresses
60
Memory Map
60
Module Configuration
60
Modules
60
Product Information
60
Secure EEPROM
60
Module Temperature Range
62
Mpsoc Device Types
62
Absolute Maximum Ratings
63
Operating Conditions
63
Recommended Operating Conditions
64
Ordering
65
Ordering and Support
65
Support
65
List of Figures
66
List of Tables
66
References
68
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Enclustra Mercury+ XU1 User Manual (66 pages)
SoC Module
Brand:
Enclustra
| Category:
Control Unit
| Size: 3 MB
Table of Contents
Table of Contents
3
1 Overview
6
General
6
Introduction
6
Warranty
6
Rohs
6
Disposal and WEEE
6
Safety Recommendations and Warnings
6
Electrostatic Discharge
7
Electromagnetic Compatibility
7
Features
7
Deliverables
8
Accessories
8
Reference Design
8
Enclustra Build Environment
8
Mercury+ PE1 Base Board
9
Xilinx Tool Support
9
2 Module Description
10
Block Diagram
10
Hardware Block Diagram
10
Module Configuration and Product Codes
11
Product Code Fields
12
Standard Module Configurations
12
Article Numbers and Article Codes
13
Module Label
13
Article Numbers and Article Codes
14
Top and Bottom Views
15
Top View
15
Bottom View
15
Module Top View
15
Module Bottom View
15
Top and Bottom Assembly Drawings
16
Top Assembly Drawing
16
Bottom Assembly Drawing
16
Module Top Assembly Drawing
16
Module Bottom Assembly Drawing
16
Module Footprint
17
Mechanical Data
17
Module Footprint - Top View
17
Module Connector
18
Pin Numbering for the Module Connector
18
Module Connector Types
18
User I/O
19
Pinout
19
I/O Pin Exceptions
20
User I/Os
20
I/O Pin Exceptions - PERST
20
Assembly Options for MGT TX/RX Signals
21
I/O Pin Exceptions - Level Shifters
21
Assembly Options for MGT REFCLK Signals
22
Assembly Options for MGT Signals and Migration Guidelines
22
Differential I/Os
23
I/O Banks
23
VCC_IO Usage
24
I/O Banks
24
Signal Terminations
25
Multiplexed I/O (MIO) Pins
26
MIO Pins Connections Overview
27
Analog Inputs
28
Multi-Gigabit Transceiver (MGT)
28
System Monitor (PL) Parameters
28
MGT Pairs
29
Power
30
Power Generation Overview
30
Generated Power Supplies
31
Power Converter Synchronization
31
Power Enable/Power Good
32
Voltage Supply Inputs
33
Voltage Supply Outputs
33
Module Power Status and Control Pins
33
Power Consumption
34
Heat Dissipation
34
Heat Sink Type
34
Voltage Monitoring
35
Clock Generation
35
Voltage Monitoring Outputs
35
Reset
36
Leds
36
Module Clock Resources
36
Reset Resources
36
Ddr4 Sdram
37
DDR4 SDRAM Type
37
User Leds
37
Status Leds
37
Signal Description
38
Termination
38
Parameters
38
DDR4 SDRAM Types
38
QSPI Flash
39
QSPI Flash Type
39
DDR4 SDRAM Parameters
39
Signal Description
40
Configuration
40
QSPI Flash Corruption Risk
40
QSPI Flash Type
40
Emmc Flash
41
Emmc Flash Type
41
Signal Description
41
SD Card
41
Dual Gigabit Ethernet
41
Ethernet PHY Type
41
Signal Description
42
Gigabit Ethernet Phys Type
42
USB1/ETH1 Selection
42
External Connectivity
43
MDIO Address
43
PHY Configuration
43
RGMII Delays Configuration
43
Gigabit Ethernet Phys Configuration - Bootstraps
43
Usb 2.0
44
USB PHY Type
44
Signal Description
44
Gigabit Ethernet Phys Configuration - RGMII Delays
44
USB 2.0 PHY Type
44
Usb 3.0
45
Display Port
45
USB 3.0 Implementation Example
45
Real-Time Clock (RTC)
46
Secure EEPROM
46
EEPROM Type
46
Debug Connector
46
Debug Connector Type
47
Debug Connector Interface - Revision 1 and 2 Modules
48
3 Device Configuration
49
Configuration Signals
49
Mpsoc Configuration Pins
49
Module Connector C Detection
50
Pull-Up During Configuration
50
Pull-Up During Configuration (PUDC) and Power-On Reset Delay Override (PORSEL) - Revision 4 Modules
50
Power-On Reset Delay Override
51
Boot Mode
51
Pull-Up During Configuration (PUDC) and Power-On Reset Delay Override (PORSEL) Resistors - Assembly Drawing Bottom View (Lower Right Part) for Revision 4 Modules
51
Jtag
52
JTAG on Module Connector
52
Boot Modes
52
External Connectivity
53
PJTAG on Debug Connector
53
JTAG Boot Mode
53
JTAG Interface - PL and PS Access and Debug
53
JTAG Interface - ARM DAP Access Via PJTAG Signals (Valid Only for Modules Revision 1 and 2)
53
Emmc Boot Mode
54
QSPI Boot Mode
54
SD Card Boot Mode
54
JTAG Boot Mode Resistor - Assembly Drawing Top View (Lower Right Part) for Revision 4 Modules
54
Emmc Flash Programming
55
QSPI Flash Programming Via JTAG
55
QSPI Flash Programming from an External SPI Master
55
SD Card Boot Modes
55
Enclustra Module Configuration Tool
56
QSPI Flash Programming from an External SPI Master - Signal Diagrams
56
4 I2C Communication
57
Overview
57
Signal Description
57
I2C Address Map
57
I2C Signal Description
57
Secure EEPROM
58
Memory Map
58
I2C Addresses
58
EEPROM Sector 0 Memory Map
58
Product Information
59
Module Configuration
59
Mpsoc Device Types
60
Module Temperature Range
60
5 Operating Conditions
61
Absolute Maximum Ratings
61
Recommended Operating Conditions
62
List of Figures
64
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