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Mercury ZX5 SoC Module
Purpose
The purpose of this document is to present the characteristics of Mercury ZX5 SoC module to the user, and
to provide the user with a comprehensive guide to understanding and using the Mercury ZX5 SoC module.
Summary
This document first gives an overview of the Mercury ZX5 SoC module followed by a detailed description
of its features and configuration options. In addition, references to other useful documents are included.
Product Information
Product
Document Information
Reference / Version / Date
Approval Information
Written by
Verified by
Approved by
User Manual
Code
ME-ZX5
Reference
D-0000-404-002
Name
DIUN
GLAC
DIUN
Enclustra GmbH – Räffelstrasse 28 – CH-8045 Zürich – Switzerland
Name
Mercury ZX5 SoC Module
Version
06
Position
Design Engineer
Design Expert
Manager, BU SP
Phone +41 43 343 39 43 – www.enclustra.com
Date
16.02.2021
Date
08.07.2016
23.08.2016
16.02.2021
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Table of Contents
Related Manuals for Enclustra Mercury ZX5 Series
Summary of Contents for Enclustra Mercury ZX5 Series
- Page 1 Name Position Date Written by DIUN Design Engineer 08.07.2016 Verified by GLAC Design Expert 23.08.2016 Approved by DIUN Manager, BU SP 16.02.2021 Enclustra GmbH – Räffelstrasse 28 – CH-8045 Zürich – Switzerland Phone +41 43 343 39 43 – www.enclustra.com...
- Page 2 Unauthorized duplication of this document, in whole or in part, by any means is prohibited without the prior written permission of Enclustra GmbH, Switzerland. Although Enclustra GmbH believes that the information included in this publication is correct as of the date of publication, Enclustra GmbH reserves the right to make changes at any time without notice.
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Page 3: Table Of Contents
Enclustra Build Environment ........ - Page 4 3.11 Enclustra Module Configuration Tool ........43 I2C Communication Overview .
- Page 5 Support ........... 50 D-0000-404-002 5 / 53 Version 06, 16.02.2021...
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Page 6: Overview
The Enclustra Build Environment [14] is available for the Mercury ZX5 SoC module. This build system allows the user to quickly set up and run Linux on any Enclustra SoC module. It allows the user to choose the desired target and download all the required binaries, such as bitstream and FSBL (First Stage Boot Loader). -
Page 7: Electrostatic Discharge
Warning! It is possible to mount the Mercury ZX5 SoC module the wrong way round on the base board - always check that the mounting holes on the base board are aligned with the mounting holes of the Mercury ZX5 SoC module. The base board and module may be damaged if the module is mounted the wrong way round and powered up. -
Page 8: Accessories
Enclustra Build Environment The Enclustra Build Environment (EBE) [14] enables the user to quickly set up and run Linux on any Enclustra SoC module or system board. It allows the user to choose the desired target, and download all the required binaries, such as bitstream and FSBL. -
Page 9: Mercury+ St1 Base Board
eMMC managed NAND flash (PE1-300/400) PCIe 4 interface USB 3.0 device connector USB 2.0 host connector (PE1-200: 1 connector; PE1-300/400: 4 connectors) Micro USB 2.0 device (UART, SPI, I2C, JTAG) connector RJ45 Gigabit Ethernet connectors mPCIe/mSATA card holder (USB only) (PE1-300/400) SIM card holder (optional, PE1-300/400 only) SMA clock and data in/out (optional, PE1-300/400 only) FMC LPC connector (PE1-200) -
Page 10: Module Description
2 Module Description Block Diagram Figure 1: Hardware Block Diagram The main component of the Mercury ZX5 SoC module is the Xilinx Zynq-7000 SoC device. Most of its I/O pins are connected to the Mercury module connector, making 158 regular user I/Os available to the user. Further, four multi-gigabit transceivers with support for PCIe Gen2 4 are available on the module connector. -
Page 11: Module Configuration And Product Codes
Figure 2: Product Code Fields Please note that for the first revision modules or early access modules, the product code may not respect entirely this naming convention. Please contact Enclustra for details on this aspect. Article Numbers and Article Codes Every module is uniquely labeled, showing the article number and serial number. -
Page 12: Module Label
Figure 3: Module Label The correspondence between article number and article code is shown in Table 2. The article code repre- sents the product code, followed by the revision; the R suffix and number represent the revision number. The revision changes and product known issues are described in the Mercury ZX5 SoC Module Known Issues and Changes document [6]. - Page 13 Article Number Article Code EN100640 ME-ZX5-15-2C-D10-R1 EN100641 ME-ZX5-15-2I-D10-R1 EN100642 ME-ZX5-30-1C-D10-R1 EN100643 ME-ZX5-30-1I-D10-R1 EN100873 ME-ZX5-30-2I-D10-R1 EN100981 ME-ZX5-15-2C-D10-R2 EN100982 ME-ZX5-15-2I-D10-R2 EN100983 ME-ZX5-30-1C-D10-R2 EN100984 ME-ZX5-30-1I-D10-R2 EN101173 ME-ZX5-30-3C-D10-R2 EN101485 ME-ZX5-15-2C-D10-R3 EN101486 ME-ZX5-15-2I-D10-R3 EN101487 ME-ZX5-30-1C-D10-R3 EN101488 ME-ZX5-30-1I-D10-R3 EN101489 ME-ZX5-30-3C-D10-R3 EN102231 ME-ZX5-15-2C-D10-R3.2 EN102232 ME-ZX5-15-2I-D10-R3.2 EN102233 ME-ZX5-30-1C-D10-R3.2 EN102234 ME-ZX5-30-1I-D10-R3.2 EN102235...
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Page 14: Top And Bottom Views
Top and Bottom Views 2.4.1 Top View Figure 4: Module Top View 2.4.2 Bottom View Figure 5: Module Bottom View Please note that depending on the hardware revision and configuration, the module may look slightly dif- ferent than shown in this document. D-0000-404-002 14 / 53 Version 06, 16.02.2021... -
Page 15: Top And Bottom Assembly Drawings
Top and Bottom Assembly Drawings 2.5.1 Top Assembly Drawing Figure 6: Module Top Assembly Drawing 2.5.2 Bottom Assembly Drawing Figure 7: Module Bottom Assembly Drawing Please note that depending on the hardware revision and configuration, the module may look slightly dif- ferent than shown in this document. -
Page 16: Module Footprint
Figure 8 shows the dimensions of the module footprint on the base board. Enclustra offers Mercury and Mercury+ modules of various geometries having widths of 56, 64, 65, 72 or 74 mm and having different topologies for the mounting holes. If different module types shall be fixed on the base board by screws, additional mounting holes may be required to accommodate different modules. -
Page 17: Mechanical Data
Mechanical Data Table 3 describes the mechanical characteristics of the Mercury ZX5 SoC module. A 3D model (PDF) and a STEP 3D model are available [8], [9]. Symbol Value Size 54 mm Component height top 1.8 mm Component height bottom 1.2 mm Weight 20 g... -
Page 18: User I/O
User I/O 2.9.1 Pinout Information on the Mercury ZX5 SoC module pinout can be found in the Enclustra Mercury Master Pinout [11], and in the additional document Enclustra Module Pin Connection Guidelines [10]. Warning! Please note that the pin types on the schematics symbol of the module connector and in the Master Pinout document are for reference only. -
Page 19: Dci Resistors
Figure 10 shows the DCI resistors connections and Figure 11 indicates the location of the DCI resistors on the module PCB - upper middle part on the bottom view drawing. Please contact Enclustra support for layout details for the components that need to be removed. -
Page 20: I/O Pin Exceptions
Figure 11: DCI Resistors - Assembly Drawing Bottom View (upper middle corner) for Revision 3 Modules 2.9.2 I/O Pin Exceptions The I/O pin exceptions are pins with special functions or restrictions. I/O Pins with Level Shifter There are four signals on the Mercury ZX5 SoC module that are routed from the FPGA banks to the module connector via level shifters - these are presented in Table 6. -
Page 21: Differential I/Os
Valid Supply Voltages Combination Module VCC_CFG_MIO VCC_IO_B34 1.8 V, 2.5 V 2.5 V ME-ZX5 - R1 and R2 1.8 V, 2.5 V, 3.3 V 3.3 V 2.5 V 1.8 V, 2.5 V ME-ZX5 - R3 3.3 V 1.8 V, 2.5 V, 3.3 V Table 7: Valid Voltage Supplies for the Level Shifter for the I/Os in Bank 34 Valid Supply Voltages Combination Module... -
Page 22: Vref Usage
Bank Connectivity VCC_IO VREF MGT Bank 112 Module connector 1.2 V User selectable Bank 0 Configuration VCC_CFG_MIO User selectable IO_B13_L6_VREF_U14_N Bank 13 Module connector VCC_IO_B13 IO_B13_L19_VREF_T17_N User selectable IO_B34_L6_VREF_M7_N Bank 34 Module connector, I2C VCC_IO_B34 IO_B34_L19_VREF_N5_N User selectable IO_B35_L6_VREF_F6_N Bank 35 Module connector, I2C, LEDs VCC_IO_B35 IO_B35_L19_VREF_H3_N... - Page 23 For compatibility with other Enclustra Mercury modules, it is recommended to use a single I/O voltage per module connector. On the Mercury ZX5 SoC module equipped with the XC7Z030 SoC device the high performance (HP) I/O banks 34 and 35 are protected against too high supply voltages. If a voltage higher than 2.2 V is applied to the corresponding supply inputs on the module connector, the supply pins of the SoC device are discon- nected, and the device is held in reset.
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Page 24: Signal Terminations
Figure 12: Power-Up Sequence - VCC_IO in Relation with PWR_GOOD and PWR_EN Signals 2.9.7 Signal Terminations Differential Inputs There are no external differential termination resistors on the Mercury ZX5 SoC module for differential in- puts. Differential input pairs on the module connector may be terminated either by external termination resistors on the base board (close to the module pins), or by the SoC device’s internal termination resistors. -
Page 25: Analog Inputs
MIO Pin Function MIO15 MDIO select = 0 MDIO select = 1 (default) MIO52 On-board I2C bus (I2C1.SCL) Ethernet PHY MDC MIO53 On-board I2C bus (I2C1.SDA) Ethernet PHY MDIO Table 11: Special MIO Pins MIO Group Function Connection 0-14 QSPI and NAND flash QSPI/NAND flash MDIO select/LED1# signal I2C/MDIO multiplexer selection, LED1#... -
Page 26: Multi-Gigabit Transceiver (Mgt)
Table 13 presents the ADC Parameters. Parameter Value VCC_ADC 1.8 V GND_ADC 0 V (connected to GND via ferrite) VREF_ADC Internal (optionally an external 1.25 V reference cir- cuit can be mounted) ADC Range 0-1 V Sampling Rate per ADC 1 MSPS Total number of channels available on the module 16 (only auxiliary inputs) -
Page 27: Power Enable/Power Good
3.3 V VCC_MOD Table 14: Generated Power Supplies Please refer to the Enclustra Module Pin Connection Guidelines for general rules on the power pins [10]. 2.11.2 Power Enable/Power Good The Mercury ZX5 SoC module provides a power enable input on the module connector. This input may be used to shut down the DC/DC converters for 1.0 V, 1.2 V, 1.35 V, 1.8 V, and 2.5 V. -
Page 28: Voltage Supply Inputs
2.11.3 Voltage Supply Inputs Table 16 describes the power supply inputs on the Mercury ZX5 SoC module. The VCC voltages used as supplies for the I/O banks are described in Section 2.9.6. Pin Name Module Connector Pins Voltage Description VCC_MOD A-1, 2, 3, 4, 5, 6, 7, 8, 9, 11 5 - 15 V Supply for the 1.0 V and 3.3 V voltage regu-... -
Page 29: Heat Dissipation
Alternatively, if the Enclustra heat sink does not match the application requirements, a third-party heat sink body (ATS) and an additional gap pad (t-Global) may be used. Please note that the Enclustra heat sink kit already contains all necessary items for cooling the module (heat sink body, gap pad, fan, mounting mate- rial). -
Page 30: Clock Generation
Pulling PS_POR# low resets the SoC device, the Ethernet and the USB PHYs, and the flash devices. Please refer to the Enclustra Module Pin Connection Guidelines [10] for general rules regarding the connection of reset pins. Pulling PS_SRST# low resets the SoC device. For details on the functions of the PS_POR_B and PS_SRST_B signals refer to the Zynq-7000 Technical Reference Manual [18]. -
Page 31: Leds
2.14 LEDs There are two active-low LEDs on the Mercury ZX5 SoC module. LED0 is connected to the FPGA logic and LED1 is connected to the pin MIO15 of the PS. Signal Name FPGA Pin Remarks FPGA_LED0# User function/active-low MDIO_SEL_LED1# E17 (MIO15) User function/active-low;... -
Page 32: Signal Description
2.15.2 Signal Description Please refer to the Mercury ZX5 SoC Module FPGA Pinout Excel Sheet [4] for detailed information on the DDR3 SDRAM connections. 2.15.3 Termination Warning! No external termination is implemented on the Mercury ZX5 SoC module. Therefore, it is strongly recommended to enable the on-die termination (ODT) feature of the DDR3 SDRAM device. -
Page 33: Qspi Flash
Parameter Byte 3 Byte 2 Byte 1 Byte 0 DQS to clock delay (ns) 0.062 0.031 0.017 -0.026 Board delay (ns) 0.180 0.193 0.205 0.224 Table 24: DDR3L Board Timing 2.16 QSPI Flash The QSPI flash can be used to boot the PS, and to store the FPGA bitstream, ARM application code and other user data. -
Page 34: Configuration
2.16.3 Configuration The QSPI flash supports up to 50 MHz operation for standard read. For fast, dual and quad read speed values, please refer to the flash device datasheet. Note that the “Feedback Clk” option on pin MIO8 must be enabled in the Zynq configuration for clock rates higher than 40 MHz. -
Page 35: Parameters
Please note that Xilinx recommends operation at 1.8 V/2.5 V for the RGMII interface for the MIO pins [18]. Enclustra tests have shown that the RGMII is functional with a 3.3 V I/O voltage on the MIO pins, as long as the I/O voltage configured in Vivado matches the applied I/O voltage. -
Page 36: Signal Description
Table 29: Gigabit Ethernet Signal Description 2.19.3 External Connectivity The Ethernet signal lines can be connected directly to the magnetics. Please refer to the Enclustra Module Pin Connection Guidelines [10] for details regarding the connection of Ethernet signals. 2.19.4 MDIO Address The MDIO address assigned to the Gigabit Ethernet PHY is 3. -
Page 37: Phy Configuration
See Section 4 for details on the I2C bus on the Mercury ZX5 SoC module. VBAT pin of the RTC is connected to VCC_BAT on the module connector, and can be connected directly to a 3 V battery. Please refer to the Enclustra Module Pin Connection Guidelines [10] for details. D-0000-404-002 37 / 53 Version 06, 16.02.2021... -
Page 38: Rtc Type
Note that the frequency output mode of the RTC must be disabled when using I2C interrupt system. Other- wise, I2C_INT# is periodically pulled down by the RTC. The disabling of this function can be done by setting bits [3:0] of the RTC register 8 to logic low. 2.21.1 RTC Type Table 32 describes the equipped RTC device type on the Mercury ZX5 SoC module. -
Page 39: Device Configuration
3 Device Configuration Configuration Signals The PS of the SoC needs to be configured before the FPGA logic can be used. Xilinx Zynq devices need special boot images to boot from QSPI flash or SD card. For more information, please refer to the Xilinx Zynq-7000: Concepts, Tools, and Techniques document [20]. -
Page 40: Pull-Up During Configuration
Signal Mod. Conn. Description Comments Name Pin Type 10 k pull-up to BOOT_MODE1 A-112 Boot mode selection VCC_CFG_MIO Table 34: SoC Configuration Pins Warning! All configuration signals except for BOOT_MODE must be high impedance as soon as the device is released from reset. -
Page 41: Jtag
It is recommended to add 22 series termination resistors between the module and the JTAG header, close to the source. Please refer to the Enclustra Module Pin Connection Guidelines for details on JTAG interface. QSPI Boot Mode In the QSPI boot mode, the PS boots from the QSPI flash located on the module. The flash device is con- nected to the PS MIO pins 1-6. -
Page 42: Nand Boot Mode
In software versions older than Vivado 2014.4, the card detect check in the Xilinx FSBL must be disabled. For details, please contact Enclustra Support team. The SDIO controller must be fed with a reasonable clock frequency. Please refer to the reference design for guidelines on SDIO settings. -
Page 43: Nand Flash Programming
3.11 Enclustra Module Configuration Tool In combination with an Enclustra base board, the QSPI flash can be programmed using the Enclustra Module Configuration Tool (MCT) [16]. Please note that the Xilinx Zynq devices do not support slave serial configuration, therefore only flash pro- gramming is supported by the Enclustra MCT for the Mercury ZX5 SoC module. -
Page 44: I2C Communication
4 I2C Communication Overview The I2C bus on the Mercury ZX5 SoC module is connected to the SoC device, EEPROM and RTC, and is available on the module connector. This allows external devices to read the module type and to connect more devices to the I2C bus. -
Page 45: Secure Eeprom
An example demonstrating how to read the module information from the EEPROM memory is included in the Mercury ZX5 SoC module reference design. Warning! The secure EEPROM is for Enclustra use only. Any attempt to write data to the secure EEPROM causes the warranty to be rendered void. 4.4.1... -
Page 46: Product Information
Module Product Family Reserved Revision Product Information Mercury ZX5 SoC module 0x0328 0x[XX] 0x[YY] 0x0328 [XX][YY] Table 40: Product Information Module Configuration Addr. Bits Comment Min. Value Max. Value Comment See SoC type SoC type 0x08 table (Table 42) SoC device speed grade Temperature range 0 (Commercial) 1 (Industrial) - Page 47 Ethernet MAC Address The Ethernet MAC address is stored using big-endian byte order (MSB on the lowest address). Each module is assigned two sequential MAC addresses; only the lower one is stored in the EEPROM. D-0000-404-002 47 / 53 Version 06, 16.02.2021...
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Page 48: Operating Conditions
5 Operating Conditions Absolute Maximum Ratings Table 43 indicates the absolute maximum ratings for Mercury ZX5 SoC module. The values given are for reference only; for details please refer to the Zynq-7000 DC and AC Switching Characteristics Datasheets [23], [24]. Symbol Description Rating... -
Page 49: Recommended Operating Conditions
Recommended Operating Conditions Table 44 indicates the recommended operating conditions for Mercury ZX5 SoC module. The values given are for reference only; for details please refer to the Zynq-7000 DC and AC Switching Characteristics Datasheets [23], [24]. Symbol Description Rating Unit VCC_MOD Supply voltage relative to GND... -
Page 50: Ordering And Support
6 Ordering and Support Ordering Please use the Enclustra online request/order form for ordering or requesting information: http://www.enclustra.com/en/order/ Support Please follow the instructions on the Enclustra online support site: http://www.enclustra.com/en/support/ D-0000-404-002 50 / 53 Version 06, 16.02.2021... - Page 51 List of Figures Hardware Block Diagram ........10 Product Code Fields .
- Page 52 I2C Addresses ..........45 EEPROM Sector 0 Memory Map .
- Page 53 [13] Mercury+ PE1 User Manual Ask Enclustra for details [14] Enclustra Build Environment Ask Enclustra for details [15] Enclustra Build Environment How-To Guide Ask Enclustra for details [16] Enclustra Module Configuration Tool http://www.enclustra.com/en/products/tools/module-configuration-tool/ [17] Mercury Heatsink Application Note Ask Enclustra for details...
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