Analog Devices AD9739 Manual page 33

Table 24. LVDS Receiver Status Registers (Register 0x19, Register 0x1A, Register 0x1B, Register 0x1C, Register 0x1D,
Register 0x1E, Register 0x1F, Register 0x20, Register 0x21)
Register
1
Name Address Bit 7
LVDS_ 0x19 25 SMP_DEL[1]
REC_STAT1
LVDS_ 0x1A 26 SMP_DEL[9]
REC_STAT2
LVDS_ 0x1B 27 DCI_DEL[1]
REC_STAT3
LVDS_ 0x1C 28 DCI_DEL[9]
REC_STAT4
LVDS_ 0x1D 29 FINE_DEL_
REC_STAT5 PST[3]
LVDS_ 0x1E 30 N/A
REC_STAT6
LVDS_ 0x1F 31 SYNCSH_
REC_STAT7 DEL[0]
LVDS_ 0x20 32 SYNCSH_
REC_STAT8 DEL[8]
LVDS_ 0x21 33 SYNC_TRK_
ON
REC_STAT9
1 The two-digit number is the decimal representation of the address.
Table 25. LVDS Receiver Status Register Bit Descriptions
Bit Name Read/Write
SMP_DEL[9:0] Read
SMP_FINE_DEL[3:0] Read
SYNCOUTPH[1:0] Read
CLKDIVPH[1:0] Read
DCI_DEL[9:0] Read
FINE_DEL_PRE[3:0] Read
FINE_DEL_PST[3:0] Read
SYNCO_DEL[6:0] Read
SYNCSH_DEL[8:0] Read
SYNC_TRK_ON Read
SYNC_INIT_ON Read
SYNC_LST_LCK Read
SYNC_LCK Read
RCVR_TRK_ON Read
Bit 6 Bit 5
SMP_DEL[0] N/A
SMP_DEL[8] SMP_DEL[7]
DCI_DEL[0] N/A
DCI_DEL[8] DCI_DEL[7]
FINE_DEL_ FINE_DEL_
PST[2] PST[1]
SYNCO_ SYNCO_
DEL[6] DEL[5]
N/A N/A
SYNCSH_ SYNCSH_
DEL[7] DEL[6]
SYNC_INIT_ SYNC_LST
ON
_LCK
Description
Readback of the present SMP_DEL value. In tracking mode, it represents the
current valid SMP_DEL setting. In manual mode, it is a readback of the value
written to SMP_DEL[9:0] in Register 17 and Register 18.
Readback of the sample fine delay line value (this is the same as FINE_MID_DEL).
Readback of the present SYNC_OUT phase selection.
Readback of the present CLK divider phase rotation.
Readback of the present DCI_DEL value. In tracking mode, it represents the
current valid DCI_DEL setting. In manual mode, it is a readback of the value
written to DCI_DEL[9:0] in Register 13 and Register 14.
Present fine delay setting for the pre DCI window search delay line.
Present fine delay setting for the post DCI window search delay line.
Readback of the present SYNCO_DEL value. In tracking mode, it represents the
current value of the SYNCO_DEL setting. In manual mode, it is a readback of the
value written to SYNCO_DEL[6:0] in Register 16.
Readback of the present SYNCSH_DEL value. In tracking mode, it represents the
current value of the SYNCSH_DEL setting. In manual mode, it is a readback of the
value written to SYNCSH_DEL[8:0] in Register 17 and Register 18.
0: with the sync controller enabled, tracking mode has not been established.
1: with the sync controller enabled, tracking mode has been established.
1: indicates that the sync controller is in initialize mode.
0: sync lock has not been lost.
1: sync lock has been lost at some point.
0: the sync controller is not locked.
1: the sync controller is locked.
0: with the receiver controller enabled, tracking mode has not been established.
1: with the receiver controller enabled, tracking mode has been established.
Rev. A | Page 33 of 56
Bit 4 Bit 3
N/A SMP_FINE
_DEL[3]
SMP_DEL[6] SMP_DEL[5]
N/A SYNCOUT
PH[1]
DCI_DEL[6] DCI_DEL[5]
FINE_DEL_ FINE_DEL_
PST[0] PRE[3]
SYNCO_ SYNCO_
DEL[4] DEL[3]
N/A N/A
SYNCSH_ SYNCSH_
DEL[5] DEL[4]
SYNC_LCK RCVR_TRK_
ON
AD9739
Bit 2 Bit 1
SMP_FINE SMP_FINE
_DEL[2] _DEL[1]
SMP_DEL[4] SMP_DEL[3]
SYNCOUT CLKDIV
PH[0] PH[1]
DCI_DEL[4] DCI_DEL[3]
FINE_DEL_ FINE_DEL_
PRE[2] PRE[1]
SYNCO_ SYNCO_
DEL[2] DEL[1]
N/A N/A
SYNCSH_ SYNCSH_
DEL[3] DEL[2]
RCVR_FE_ RCVR_LST_
ON LCK
Reset Value for
Write Register
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 0
SMP_FINE
_DEL[0]
SMP_DEL[2]
CLKDIV
PH[0]
DCI_DEL[2]
FINE_DEL_
PRE[0]
SYNCO_
DEL[0]
N/A
SYNCSH_
DEL[1]
RCVR_LCK