8-Bit Timer/Event Counters 2 Tm2 And 3 Tm3 Cautions - NEC mPD780852 Series Preliminary User's Manual

CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 2 TM2 AND 3 TM3

8.5 8-Bit Timer/Event Counters 2 TM2 and 3 TM3 Cautions

(1) Timer start errors
An error with a maximum of one clock may occur concerning the time required for a match signal to be generated
after timer start. This is because 8-bit counters 2 and 3 (TM2 and TM3) is started asynchronously with the count
pulse.
Figure 8-11. 8-Bit Counters 2 and 3 (TM2 and TM3) Start Timing
Count pulse
TMn count value
Remark n = 2, 3
(2) Operation after compare register change during timer count operation
If the values after the 8-bit compare registers 2 and 3 (CR2 and CR3) are changed are smaller than the value
of 8-bit counters 2 and 3 (TM2 and TM3), TM2 and TM3 continue counting, overflow and then restart counting
from 0. Thus, if the value (M) after CR2 and CR3 change is smaller than value (N) before the change, it is
necessary to restart the timer after changing CR2 and CR3.
Figure 8-12. Timing after Compare Register Change during Timer Count Operation
Count pulse
CRn
TMn count value
Remarks 1. N > X > M
2. n = 2, 3
(3) TM2 and TM3 reading during timer operation
When TM2 and TM3 are read during operation, choose a select clock which has a longer high/low level wave
because the select clock is stopped temporarily.
00H 01H
Timer start
N
X – 1 X
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02H 03H 04H
M
FFH 00H 01H 02H
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