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3.4.6 Register indirect addressing
[Function]
This addressing is to address a memory area to be manipulated by using as an operand address the contents
of a register pair specified by the register bank select flags (RBS0 and RBS1) and the register pair specification
code in the operation code. This addressing can be carried out for all the memory spaces.
[Operand format]
Identifier
—
[Description example]
MOV A, [DE]; when selecting [DE] as register pair
[Operation]
16
DE
The contents of the memory
addressed are transferred.
7
A
CHAPTER 3 CPU ARCHITECTURE
Description
[DE], [HL]
Operation code
1 0 0 0 0 1 0 1
8
7
D
7
Memory
0
Preliminary User's Manual U14581EJ3V0UM00
0
E
0
The memory address
specified with the
register pair DE
71
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