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3.3 Instruction Address Addressing
An instruction address is determined by program counter (PC) contents and is normally incremented (+1 for each
byte) automatically according to the number of bytes of an instruction to be fetched each time another instruction is
executed. When a branch instruction is executed, the branch destination information is set to the PC and branched
by the following addressing (For details of instructions, refer to 78K/0 SERIES USER'S MANUAL Instructions
(U12326E)).
3.3.1 Relative addressing
[Function]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the
start address of the following instruction is transferred to the program counter (PC) and branched. The
displacement value is treated as signed two's complement data (–128 to +127) and bit 7 becomes a sign bit.
In other words, relative addressing consists in relative branching from the start address of the following instruction
to the –128 to +127 range.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
[Operation]
15
15
15
PC
When S = 0, all bits of α are 0.
When S = 1, all bits of α are 1.
CHAPTER 3 CPU ARCHITECTURE
PC
+
8
7
6
α
S
Preliminary User's Manual U14581EJ3V0UM00
0
PC indicates the start address
...
of the instruction
after the BR instruction.
0
jdisp8
0
63
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