NEC mPD780852 Series Preliminary User's Manual page 60

Address Special-Function Register (SFR) Name
FF00H Port 0
FF01H Port 1
FF02H Port 2
FF03H Port 3
FF04H Port 4
FF05H Port 5
FF06H Port 6
FF08H Port 8
FF09H Port 9
FF0AH 8-bit compare register 1
FF0BH 8-bit compare register 2
FF0CH 8-bit compare register 3
FF0DH 8-bit counter 1
FF0EH 8-bit counter 2
FF0FH 8-bit counter 3
FF10H Capture register 00
FF11H
FF12H Capture register 01
FF13H
FF14H Capture register 02
FF15H
FF16H 16-bit timer register 0
FF17H
FF18H Serial I/O shift register 3
FF19H Transmit shift register
Receive buffer register
FF1BH A/D conversion result register
FF1FH Serial I/O shift register 2
Note When PM2 and PM3 are set to 00H, read operation is enabled. Moreover, when PM2 and PM3 are set
to FFH, these ports go into a high-impedance state.
60
CHAPTER 3 CPU ARCHITECTURE
Table 3-3. Special-Function Register List (1/3)
Symbol
P0
P1
P2
P3
P4
P5
P6
P8
P9
CR1
CR2
CR3
TM1
TM2
TM3
CR00
CR01
CR02
TM0
SIO3
TXS
RXB
ADCR1
SIO2
Preliminary User's Manual U14581EJ3V0UM00
Manipulatable Bit Unit
R/W
1 Bit 8 Bits
R/W
R —
Note
R/W
R/W
—
—
—
R —
—
—
— —
— —
— —
— —
R/W —
W —
R —
R —
R/W —
After Reset
16 Bits
— 00H
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0000H
— 00H
— FFH
— FFH
— 00H
—