NEC mPD780852 Series Preliminary User's Manual page 62

Address Special-Function Register (SFR) Name
FF80H A/D converter mode register
FF81H Analog input channel specification register
FF82H Power-fail compare mode register
FF83H Power-fail compare threshold value register
FF84H Serial operation mode register 3
FF85H Asynchronous serial interface mode register
FF86H Asynchronous serial interface status register
FF87H Baud rate generator control register
FF89H D/A converter mode register
FF94H Sound generator control register
FF95H Sound generator buzzer control register
FF96H Sound generator amplitude register
FF98H Serial operation mode register 2
FF99H Serial receive data buffer register
FF9AH Serial receive data buffer status register
FFA0H Oscillator mode register
FFB0H LCD display mode register
FFB2H LCD display control register
FFE0H Interrupt request flag register 0L
FFE1H Interrupt request flag register 0H
FFE2H Interrupt request flag register 1L
FFE4H Interrupt mask flag register 0L
FFE5H Interrupt mask flag register 0H
FFE6H Interrupt mask flag register 1L
FFE8H Priority specify flag register 0L
FFE9H Priority specify flag register 0H
FFEAH Priority specify flag register 1L
FFF0H Memory size switching register
FFF4H Internal expansion RAM size switching register
FFF9H Watchdog timer mode register
FFFAH Oscillation stabilization time select register
FFFBH Processor clock control register
Notes 1. DAM0 is a register that must be set when debugging the µ PD780852 with an in-circuit emulator (IE-78K0-
NS). Set this register when emulating a power-fail detection function.
2. µ PD780851(A), 780852(A) only
3. The initial value of this register is CFH. Set the following value to this register of each model.
µ PD780851(A): C8H
µ PD780852(A): CAH
µ PD78F0852 (to set the same memory map as µ PD780851(A)): C8H
µ PD78F0852 (to set the same memory map as µ PD780852(A)): CAH
4. Although the initial value of this register is 0CH, set this register to 0BH.
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CHAPTER 3 CPU ARCHITECTURE
Table 3-3. Special-Function Register List (3/3)
Symbol
ADM1
ADS1
PFM
PFT
CSIM3
ASIM
ASIS
BRGC
Note 1
DAM1
SGCR
SGBR
SGAM
CSIM2
SIRB2
SRBS2
Note 2
OSCM
LCDM
LCDC
IF0
IF1L
MK0 MK0L
MK1L
PR0
PR1L
IMS
IXS
WDTM
OSTS
PCC
Preliminary User's Manual U14581EJ3V0UM00
Manipulatable Bit Unit
R/W
1 Bit 8 Bits
R/W
R —
R/W —
W
R/W
—
—
IF0L
IF0H
MK0H
PR0L
PR0H
—
—
—
After Reset
16 Bits
— 00H
—
—
—
—
—
—
—
—
—
—
—
—
— Undefined
— 00H
—
—
—
—
FFH
—
—
Note 3
— CFH
Note 4
— 0CH
— 00H
— 04H
—