NEC mPD780852 Series Preliminary User's Manual page 106

(2) Capture pulse control register (CRC0)
This register specifies the division ratio of the capture pulse input to the 16-bit capture register (CR02) from an
external source.
CRC0 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input clears CRC0 to 00H.
Figure 6-3. Capture Pulse Control Register (CRC0) Format
Address: FF71H After Reset: 00H
Symbol 7
CRC0 0
CRC01
0
0
1
1
Cautions 1. Timer operation must be stopped before setting CRC0.
2. Bits 2 to 7 must be set to 0.
106
CHAPTER 6 16-BIT TIMER 0 TM0
R/W
6 5 4
0 0 0
CRC00
0 Does not divide capture pulse
1 Divides capture pulse by 2
0 Divides capture pulse by 4
1 Divides capture pulse by 8
Preliminary User's Manual U14581EJ3V0UM00
3 2 1
0 0 CRC01
Capture Pulse Selection
0
CRC00