NEC mPD780852 Series Preliminary User's Manual page 235

(2) Compare control register n (MCMPCn)
MCMPCn is an 8-bit register that controls the operation of the compare register and output direction of the PWM
pin.
MCMPCn is set with an 8-bit memory manipulation instruction.
RESET input clears MCMPCn to 00H.
Figure 18-4 shows the MCMPCn format.
Figure 18-4. Compare Control Register n (MCMPCn) Format
Address: FF6BH to FF6EH
Symbol 7
MCMPCn 0
Note
TENn
0
1
ADBn1
0
1
ADBn0
0
1
DIRn1
0
0
1
1
Note TENn functions as a control bit and status flag.
As soon as the timer overflows and PWM data is output, TENn is cleared to "0" by hardware.
Caution Bits 5 to 7 must be set to 0.
Remark n = 1 to 4
CHAPTER 18 METER CONTROLLER/DRIVER
After Reset: 00H R/W
6 5
0 0 TENn
Transfer Enable Control Bit by Register from Master to Slave
Disables data transfer from master to slave.
New data can be written.
Transfers data from master to slave when MCNT overflows.
New data cannot be written.
1-Bit Addition Circuit Control (cos side of meter n)
No 1-bit addition to PWM output
1-bit addition to PWM output
1-Bit Addition Circuit Control (sin side of meter n)
No 1-bit addition to PWM output
1-bit addition to PWM output
DIRn0
SMn1
0 PWM
1 PWM
0 0
1 0
Preliminary User's Manual U14581EJ3V0UM00
4 3 2
ADBn1 ADBn0
Output Pin Control
SMn2 SMn3
0 PWM
0 0
PWM 0
PWM PWM
1 0
DIRn1 DIRn0
SMn4
0
PWM
PWM
0
235