Mitsubishi MELSEC L Series User Manual page 350

Special
ACPU
Register
Special Register for
after
Register Modification
Conversion
D9038 SD1038 SD207
D9039 SD1039 SD208
D9044 SD1044
D9049 SD1049
D9050 SD1050
D9051 SD1051
D9052 SD1052
D9053 SD1053
D9054 SD1054
D9055 SD1055 SD812
348
Special
Name
Priorities 1 to 4
LED display
priority ranking
Priorities 5 to 7
Step or time
For sampling
× during
trace
sampling trace
Block number
Work area for
× of extension
SFC
file register
Error code
SFC program
× generated by
error number
SFC program
Block number
× Error block where error
occurred
Step number
× Error step where error
occurred
Transition
condition
× Error transition
number where
error occurred
Sequence step
Error
× number where
sequence step
error occurred
Status latch Status latch
execution step execution step
number number
Meaning
• This register stores priority of errors to be indicated by the
ERROR LED (on or flash) by using cause numbers.
• Configuration of the priority setting areas is as shown
below.
b12 b11
b15 to
SD207 Priority 4
SD208
• For details, refer to the following.
User's manual of the CPU module used
Type ACPU/QCPU-A (A Mode) Programming
Manual (Fundamentals)
To operate the STRA or STRAR instruction of a sampling
trace by turning on or off SM803 with a programming tool,
use the value stored in SD1044 as the sampling trace
condition.
• When "Each scan" is selected: 0
• When a timing is specified: setting value (Unit: 10ms)
• This register stores the block No. of the extended file
register used as a work area for executing the SFC
program.
• This register stores "0" when SM320 is off and when
empty area of 16K bytes or smaller is used (16K byte or
less is too small to be used as block No.1 for an extended
file register).
This register stores an error code of the error occurred in the
SFC program.
• 0 : No error
• 80: SFC program parameter error
• 81: SFC code error
• 82: Number of steps of simultaneous execution exceeded
• 83: Block start error
• 84: SFC program operation error
• This register stores the number of the block in the SFC
program where an error occurred.
For error 83, the number of the block where the program
was started is stored.
• This register stores the number of the step in the SFC
program where error 83 occurred.
• For error 80, 81, and 82, "0" is stored.
• For error 83, the block starting step number is stored.
This register stores the number of the transition condition in
the SFC program where error code 84 occurred. For error
codes 80, 81, 82, and 83, "0" is stored.
This register stores the sequence step number of transfer
condition and operation output in the SFC program where
error 84 occurred.
• This register stores the number of the step where a status
latch was executed.
• When a status latch was executed in a main sequence
program, the step No. is stored.
• When a status latch was executed in a SFC program, the
block number and step number are stored.
Block No.
(BIN)
Upper 8 bits
Details
to b8 b7 to b4 b3 to b0
Priority 3 Priority 2 Priority 1
Priority 7 Priority 6 Priority 5
Step No.
(BIN)
Lower 8 bits
Corre-
sponding
CPU
Qn(H)
QnPH