Mitsubishi MELSEC L Series User Manual page 346

Special
ACPU
Register
Special Register for
after
Register Modification
Conversion
D9000 SD1000
D9001 SD1001
D9002 SD1002
D9005 SD1005
D9008 SD1008 SD0
D9009 SD1009 SD62
344
Special
Name
Number of
- Fuse blown module with
blown fuse
Number of
- Fuse blown module with
blown fuse
I/O module
I/O module verify error
-
verify error module
number
Number of
AC DOWN
times for AC
-
counter
DOWN
Self-diagnostic Self-diagnostic
error error number
F number at
Annunciator which external
detection failure has
occurred
Meaning
• If a module with blown fuse is detected, the lowest first I/O
number of the module is stored in hexadecimal. (Example:
If a fuse blown is occurred in the output module with output
number Y50 to Y6F, "50" is stored in hexadecimal.)
To monitor the number by a programming tool, monitor in
hexadecimal.(This register is cleared when contents in
SD1100 to SD1107 are all reset to "0".)
• Output modules on remote I/O stations are also checked
for blown fuse.
• If any fuse is blown, this register stores a number
corresponding to each setting switch number or to slot
number of the base unit.
AJ02 I/O module
Setting
switch
0
1
2
3
4
5
6
7
• For the remote I/O station, the value of (module I/O No./
10 ) + 1 is stored.
H
• If the status of the I/O modules changes from that obtained
at power-on, the lowest first I/O number of the module is
stored in hexadecimal.(Example: If a module verification
error is occurred on the output module with output
numbers Y50 to Y6F, "50" is stored in hexadecimal.) To
monitor the number by a programming tool, monitor in
hexadecimal.(This register is cleared when contents in
SD1116 to SD1123 are all reset to "0".)
• I/O module verification is conducted on I/O modules on
remote I/O stations.
• A value stored in this register is incremented by one
whenever the input voltage falls to or below 85% (AC
power) or 65% (DC power) of the rating during operation
of the CPU module.
• The counter starts the routine: counts up from 0 to 32767,
then counts down to -32768 and then again counts up to 0.
This register stores the error code of an error detected by
self-diagnostics.
• When any of F0 to F2047 (default device setting) is turned
on by the OUT F or SET F instruction, the F number that
has been detected earliest among the F numbers that
have turned on is stored in BIN code.
• SD1009 can be cleared by RST F or LEDR instruction.
If another F number has been detected, the clearing of
SD1009 causes the next number to be stored in SD1009.
Details
Extension base unit
Stored Stored
Base unit
data data
slot No.
0 0
4
1 1 5
2
2 6
3 7
3
4
5
6
7
Corre-
sponding
CPU
Qn(H)
QnPH
*1
QnU
Qn(H)
QnPH
Qn(H)
QnPH
*1
QnU
LCPU
Qn(H)
QnPH
*1
QnU
LCPU
Qn(H)
QnPH
*1
QnU
LCPU