Cpu - ADLINK Technology HPERC-IBR-MC User Manual

3.3.3

CPU

Feature
CPU
CPU Signature
Microcode Patch
Max CPU Speed
Min CPU speed
CPU Speed
Processor Cores
Intel HT Technology
Intel VT-x Technology
Intel SMX Technology
64-bit
L1 Data Cache
L1 Code Cache
L2 Cache
L3 Cache
Hyper-threading
Active Processor Cores
Limit CPUID Maximum
Execute Disable Bit
Intel Virtualization Technology
Hardware Prefetcher
28
Options Description
Info only
Info only Display CPU Signature
Info only Display CPU Microcode version
Info only Display CPU Max frequency
Info only Display CPU Min frequency
Info only Display CPU frequency
Info only Display number of processor
Info only Display Intel HT technology support
Info only Display Intel VT-x technology support
Info only Display Intel SMX technology support
Info only Display 64-bit support
Info only Display L1 data cache size
Info only Display L1 code cache size
Info only Display L2 cache size
Info only Display L3 cache size
Disabled Enabled for Windows XP and Linux (OS optimized
for Hyper-Threading Technology) and Disabled for
Enabled
other OS (OS not optimized for Hyper-Threading
Technology). When Disabled only one thread per
enabled core is enabled..
Number of cores to enable in each processor
All
1 package.
2
3
Enabled/Disabled CPUID Maximum limit.
Disabled
Enabled
Disabled XD can prevent certain classes of malicious buffer
overflow attacks when combined with a supporting
Enabled
OS (Windows Server 2003 SP1, Windows XP SP2,
SuSE Linux 9.2, Red Hat Enterprise 3 Update 3.).
When enabled, a VMM can utilize the additional
Disabled
Enabled hardware capabilities provided by Vanderpool
technology.
Disabled To turn on/off the Mid Level Cache (L2) streamer
prefetcher.
Enabled
BIOS Setup