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RIGOL
SPI Decoding (Option)
SPI bus is based on the master-slave configuration and usually consists of chip select
line (CS), clock line (SCLK), and data line (SDA). Wherein, the data lines include the
master input/slave output (MISO) data line and master output/slave input (MOSI)
data line. The oscilloscope samples the channel data on the rising or falling edge of
the clock signal (if the source is an analog channel, the oscilloscope will also judge
each data point (logic "1" or logic "0") according to the preset threshold level).
Master
In the decode setting menu, press Decode1 Bus Type, then rotate the
multifunction knob
press Bus Type continuously or enable the touch screen to select it.
1． Enable or disable the bus
Press Bus Status to enable or disable the decoding function.
11-18
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The detected ACK is 1
SCLK
MOSI
Slave
MISO
CS
Figure 11-7 SPI Serial Bus
to select "SPI". Press down the knob to select it. You can also
GlobalTestSupply
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Chapter 11 Protocol Decoding
SCLK
SDA
(MISO/MOSI)
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MSO5000 User's Guide
sales@GlobalTestSupply.co
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