Reset Initial Conditions - Holtek HT66F20 Manual

HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM

Reset Initial Conditions

The different types of reset described affect the reset flags in different ways. These flags, known
as PDF and TO are located in the status register and are controlled by various microcontroller
operations, such as the SLEEP or IDLE Mode function or Watchdog Timer. The reset flags are
shown in the table:
TO
0
�
�
�
The following table indicates the way in which the various components of the microcontroller are
affected after a power-on reset occurs.
Item
Program Co�nter
Interr�pts
WDT
Timer Mod�les
Inp�t/O�tp�t Ports
Stack Pointer
The different kinds of resets all affect the internal registers of the microcontroller in different ways.
To ensure reliable continuation of normal program execution after a reset occurs, it is important to
know what condition the microcontroller is in after a particular reset occurs. The following table
describes how each type of reset affects each of the microcontroller internal registers. Note that where
more than one package type exists the table will reflect the situation for the larger package type.
HT66F20
Register
(Power-on)
MP0 � x x x x x x x
MP� � x x x x x x x
BP - - - - - - - 0
ACC x x x x x x x x
PCL 0 0 0 0 0 0 0 0
TBLP x x x x x x x x
TBLH - - x x x x x x
TBHP - - - - - - x x
STATUS - - 0 0 x x x x
SMOD 0 0 0 0 0 0 ��
LVDC - - 0 0 - 0 0 0
INTEG - - - - 0 0 0 0
WDTC 0 � � � � 0 � 0
TBC 0 0 � � 0 � � �
INTC0 - 0 0 0 0 0 0 0
INTC� 0 0 0 0 0 0 0 0
INTC2 0 0 0 0 0 0 0 0
MFI0 - - 0 0 - - 0 0
Rev. 2.50
PDF
0 Power-on reset
� RES or LVR reset d�ring NORMAL or SLOW Mode operation
� WDT time-o�t reset d�ring NORMAL or SLOW Mode operation
� WDT time-o�t reset d�ring IDLE or SLEEP Mode operation
Reset to zero
All interr�pts will be disabled
Clear after reset� WDT begins co�nting
Timer Mod�les will be t�rned off
I/O ports will be set�p as inp�ts� and AN0~AN�� in as A/D inp�t pin
Stack Pointer will point to the top of the stack
Reset
RES or LVR Reset
� x x x x x x x
� x x x x x x x
- - - - - - - 0
� � � � � � � �
0 0 0 0 0 0 0 0
� � � � � � � �
- - � � � � � �
- - - - - - � �
- - � � � � � �
0 0 0 0 0 0 ��
- - 0 0 - 0 0 0
- - - - 0 0 0 0
0 � � � � 0 � 0
0 0 � � 0 � � �
- 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
- - 0 0 - - 0 0
�3
RESET Conditions
"�" stands for �nchanged
Condition After RESET
WDT Time-out WDT Time-out
(Normal Operation)
� x x x x x x x
� x x x x x x x
- - - - - - - 0
� � � � � � � �
0 0 0 0 0 0 0 0
� � � � � � � �
- - � � � � � �
- - - - - - � �
- - � � � � � �
0 0 0 0 0 0 ��
- - 0 0 - 0 0 0
- - - - 0 0 0 0
0 � � � � 0 � 0
0 0 � � 0 � � �
- 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
- - 0 0 - - 0 0
(IDLE)
� � � � � � � �
� � � � � � � �
- - - - - - - �
� � � � � � � �
0 0 0 0 0 0 0 0
� � � � � � � �
- - � � � � � �
- - - - - - ��
- - �� � � � �
� � � � � � � �
- - � � - � � �
- - - - � � � �
� � � � � � � �
� � � � � � � �
- � � � � � � �
� � � � � � � �
� � � � � � � �
- - � � - - � �
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