HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Co�nter Val�e
CCRA > 0 Co�nter cleared by CCRA val�e
0x3FF
CCRA
CCRB
TnON
TnPAU
TnBPOL
CCRA Int.
Flag TnAF
CCRB Int.
Flag TnBF
TPnB O/P
Pin
O�tp�t Toggle with
TnBF flag
O�tp�t pin set to
initial Level Low
if TnBOC=0
Here TnBIO [�:0] = ��
Toggle O�tp�t select
ETM CCRB Compare Match Output Mode – TnCCLR=1
Note: 1. With TnCCLR=1, a Comparator A match will clear the counter
2. The TPnB output pin is controlled only by the TnBF flag
3. The TPnB output pin is reset to its initial state by a TnON bit rising edge
4. The TnPF flag is not generated when TnCCLR=1
Rev. 2.50
TnCCLR = �; TnBM [�:0] = 00
CCRA=0
Res�me
Pa�se
Stop
O�tp�t not affected by
TnBF flag. Remains High
�ntil reset by TnON bit
Note TnBIO [�:0] = �0
O�tp�t controlled by
Active High O�tp�t select
other pin-shared f�nction
�5�
CCRA = 0
Co�nter overflow
Co�nter Restart
Time
No TnAF flag
generated on
CCRA overflow
O�tp�t Inverts
when TnBPOL is high
O�tp�t Pin
Reset to Initial val�e
��ne 22� 20��
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