HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Co�nter Val�e
CCRA
CCRP
TnON
TnPAU
TnPOL
CCRP Int.
Flag TnPF
CCRA Int.
Flag TnAF
TM O/P Pin
(TnOC=�)
TM O/P Pin
(TnOC=0)
PWM D�ty Cycle
set by CCRP
Note: 1. Here TnDPX=1 -- Counter cleared by CCRA
2. A counter clear sets the PWM Period
3. The internal PWM function continues running even when TnIO [1:0]=00 or 01
4. The TnCCLR bit has no influence on PWM operation
Rev. 2.50
Co�nter cleared
by CCRA
Pa�se Res�me
PWM Period
set by CCRA
PWM Mode – TnDPX=1
�39
TnDPX = �; TnM [�:0] = �0
Co�nter Reset when
TnON ret�rns high
Co�nter Stop if
TnON bit low
PWM res�mes
operation
O�tp�t controlled by
O�tp�t Inverts
other pin-shared f�nction
when TnPOL = �
��ne 22� 20��
Time
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