Holtek HT66F20 Manual page 160

Co�nter Val�e
Co�nter Cleared by CCRP
CCRP
CCRA
CCRB
TnON
TnPAU
TnAPOL
CCRA Int.
Flag TnAF
CCRB Int.
Flag TnBF
CCRP Int.
Flag TnPF
TPnA Pin
(TnAOC=�)
D�ty Cycle
set by CCRA
TPnB Pin
(TnBOC=�)
TPnB Pin
(TnBOC=0)
D�ty Cycle
set by CCRB
Note: 1. Here TnCCLR=0 therefore CCRP clears the counter and determines the PWM period
2. The internal PWM function continues running even when TnAIO [1:0] (or TnBIO [1:0])=00 or 01
3. CCRA controls the TPnA PWM duty and CCRB controls the TPnB PWM duty
Rev. 2.50
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
TnCCLR = 0;
TnAM [�:0] = �0� TnBM [�:0] = �0;
TnPWM [�:0] = 00
Pa�se
D�ty Cycle D�ty Cycle
set by CCRA set by CCRA
PWM Period set by CCRP
ETM PWM Mode – Edge Aligned
�60
Co�nter
Res�me
Stop
Restart
O�tp�t Inverts
when TnAPOL
is high
O�tp�t controlled by O�tp�t Pin
other pin-shared f�nction Reset to Initial val�e
��ne 22� 20��
Time