Register Name
7
ADRL(ADRFS=0)
D3
ADRL(ADRFS=�)
D�
ADRH(ADRFS=0)
D��
ADRH(ADRFS=�)
—
ADCR0
START
ADCR�
ACS4
ACERL
ACE�
ACERH
—
A/D Converter Data Registers – ADRL, ADRH
As the devices contain an internal 12-bit A/D converter, they require two data registers to store the
converted value. These are a high byte register, known as ADRH, and a low byte register, known
as ADRL. After the conversion process takes place, these registers can be directly read by the
microcontroller to obtain the digitised conversion value. As only 12 bits of the 16-bit register space
is utilised, the format in which the data is stored is controlled by the ADRFS bit in the ADCR0
register as shown in the accompanying table. D0~D11 are the A/D conversion result data bits. Any
unused bits will be read as zero.
ADRFS
7
6
0
D�� D�0 D9
�
0
0
A/D Converter Control Registers – ADCR0, ADCR1, ACERL, ACERH
To control the function and operation of the A/D converter, three or four control registers known as
ADCR0, ADCR1, ACERL and ACERH are provided. These 8-bit registers define functions such
as the selection of which analog channel is connected to the internal A/D converter, the digitised
data format, the A/D clock source as well as controlling the start function and monitoring the A/D
converter end of conversion status. The ACS3~ACS0 bits in the ADCR0 register and ACS4 bit is
the ADCR1 register define the ADC input channel number. As the device contains only one actual
analog to digital converter hardware circuit, each of the individual 8 or 12 analog inputs must be
routed to the converter. It is the function of the ACS4~ACS0 bits to determine which analog channel
input pins or internal 1.25V is actually connected to the internal A/D converter.
The ACERH and ACERL control registers contain the ACER11~ACER0 bits which determine
which pins on Port A, PE6, PE7, PF0 and PF1 are used as analog inputs for the A/D converter input
and which pins are not to be used as the A/D converter input. Setting the corresponding bit high will
select the A/D input function, clearing the bit to zero will select either the I/O or other pin-shared
function. When the pin is selected to be an A/D input, its original function whether it is an I/O or
other pin-shared function will be removed. In addition, any internal pull-high resistors connected to
these pins will be automatically removed if the pin is selected to be an A/D input.
Rev. 2.50
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Bit
6
5
4
D2
D�
D0
D6
D5
D4
D�0
D9
D8
—
—
—
EOCB
ADOFF
ADRFS
V�25EN
—
VREFS
ACE6
ACE5
ACE4
—
—
—
HT66F60 A/D Converter Register List
ADRH
5
4
3
2
1
0
D8
D�
D6
D5
D4
0
0
D�� D�0 D9
D8
A/D Data Registers
��0
3
2
1
—
—
—
D3
D2
D�
D�
D6
D5
D��
D�0
D9
ACS3
ACS2
ACS�
—
ADCK2
ADCK�
ACE3
ACE2
ACE�
ACE��
ACE�0
ACE9
ADRL
7
6
5
4
3
2
D3
D2
D�
D0
0
0
D�
D6
D5
D4
D3
D2
��ne 22� 20��
0
—
D0
D4
D8
ACS0
ADCK0
ACE0
ACE8
1
0
0
0
D�
D0
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