Tm External Pins - Holtek HT66F20 Manual

A/d flash mcu with eeprom
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HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM

TM External Pins

Each of the TMs, irrespective of what type, has one TM input pin, with the label TCKn. The TM
input pin, is essentially a clock source for the TM and is selected using the TnCK2~TnCK0 bits in
the TMnC0 register. This external TM input pin allows an external clock source to drive the internal
TM. This external TM input pin is shared with other functions but will be connected to the internal
TM if selected using the TnCK2~TnCK0 bits. The TM input pin can be chosen to have either a
rising or falling active edge.
The TMs each have one or more output pins with the label TPn. When the TM is in the Compare
Match Output Mode, these pins can be controlled by the TM to switch to a high or low level or
to toggle when a compare match situation occurs. The external TPn output pin is also the pin
where the TM generates the PWM output waveform. As the TM output pins are pin-shared with
other function, the TM output function must first be setup using registers. Asingle bit in one of the
registers determines if its associated pin is to be used as an external TM output pin or if it is to have
another function. The number of output pins for each TM type and device is different, the details are
provided in the accompanying table.
All TM output pin names have an "_n" suffix. Pin names that include a "_1" or "_2" suffix indicate
that they are from a TM with multiple output pins. This allows the TM to generate a complimentary
output pair, selected using the I/O register data bits.
Device
HT66F20
HT66F30
TP0_0� TP0_�
HT66F40
TP0_0� TP0_�
TP0_0� TP0_�
HT66F50
TP3_0� TP3_�
TP0_0� TP0_�
HT66F60
TP3_0� TP3_�
Rev. 2.50
CTM
STM
TP0_0
TP�_0� TP�_�
TP�A� TP�B_0� TP�B_�
TP2_0� TP2_� TP�A� TP�B_0� TP�B_�� TP�B_2 TMPC0� TMPC�
TP2_0� TP2_� TP�A� TP�B_0� TP�B_�� TP�B_2 TMPC0� TMPC�
TP2_0� TP2_� TP�A� TP�B_0� TP�B_�� TP�B_2 TMPC0� TMPC�
TM Output Pins
�0�
ETM
Registers
TMPC0
TMPC0
��ne 22� 20��

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