ADMtek ADM5120 Datasheet page 82

ADM5120
Bits Type Name
9 R/W LSDV
15:10 RO Reserved
16 R/W CSC
17 R/W PESC
18 R/W PSSC
ADMtek Inc.
Description
0 = port power is off
1 = port power is on
(write) SetPortPower
The HCD writes a 1 to set the PPS bit. Writing a 0
has no effect.
Note: This bit is always reads 1 if power switching is
not supported.
(read) LowSpeedDeviceAttached
This bit indicates the speed of the device attached to this
port. When set, a Low Speed device is attached to this
port. When clear, a Full Speed device is attached to this
port. This field is valid only when the
CurrentConnectStatus is set.
0 = full speed device attached
1 = low speed device attached
(write) ClearPortPower
The HCD clears the PortPowerStatus bit by writing a 1
to this bit. Writing a 0 has no effect.
Not Applicable
ConnectStatusChange
This bit is set whenever a connect or disconnect event
occurs. The HCD writes a 1 to clear this bit. Writing a 0
has no effect. If CCS is cleared when a SPR, SPE, or
SPS write occurs, this bit is set to force the driver to re-
evaluate the connection status since these writes should
not occur if the port is disconnected.
0 = no change in CCS
1 = change in CCS
Note: this bit is set only after a Root Hub reset to inform
the system that the device is attached.
PortEnableStatusChange
This bit is set when hardware events cause the PES bit
to be cleared. Changes from HCD writes do not set this
bit. The HCD writes a 1 to clear this bit. Writing a 0 has
no effect.
0 = no change in PES
1 = change in PES
PortSuspendStatusChange
This bit is set when the full resume sequence has been
completed.
This sequence includes the 20-s resume pulse, LS EOP,
and 3-ms resychronization delay. The HCD writes a 1 to
clear this bit. Writing a 0 has no effect. This bit is also
cleared when RSC is set.
0 = resume is not completed
Register Description
Initial value
0
0
0
0
0
4-35