Table Of Contents - ADMtek ADM5120 Datasheet

ADMtek Inc.

Table of Contents

CHAPTER 1 PRODUCT OVERVIEW ...................................................................... 1-1
1.1 O
VERVIEW
1.1.1
1.2 F
EATURES
1.3 B
LOCK
1.4 A
BBREVIATIONS
1.5 C
ONVENTIONS
1.5.1
1.5.2
1.5.3
CHAPTER 2 INTERFACE DESCRIPTION.............................................................. 2-1
2.1 P
IN
2.1.1
2.1.2
2.2 P
IN
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10
2.2.11
2.2.12
2.2.13
2.2.14
2.2.15
2.2.16
CHAPTER 3 FUNCTION DESCRIPTION................................................................ 3-1
3.1 S
YSTEM
3.1.1
3.1.2
3.1.3
3.2 PHY...................................................................................................................... 3-2
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
ADM5120
............................................................................................................ 1-1
Product Order Information...................................................................... 1-1
............................................................................................................. 1-2
D .................................................................................................. 1-3
IAGRAM
................................................................................................... 1-3
...................................................................................................... 1-5
Data Lengths............................................................................................ 1-5
Register Descriptions............................................................................... 1-5
Pin Descriptions....................................................................................... 1-5
A .................................................................................................. 2-1
SSIGNMENT
324BGA Ball assignment ......................................................................... 2-1
208PQFP pin assignment ........................................................................ 2-3
D F
ESCRIPTION BY UNCTION
Network Media Connection ..................................................................... 2-5
Clock for Network .................................................................................... 2-5
LED .......................................................................................................... 2-5
GMII/MII Management............................................................................ 2-6
Memory Bus ............................................................................................. 2-7
SDRAM Control Signals .......................................................................... 2-8
UART........................................................................................................ 2-8
JTAG ........................................................................................................ 2-9
General Purpose I/O (GPIO)................................................................... 2-9
PCI ........................................................................................................... 2-9
USB ........................................................................................................ 2-10
NAND Flash........................................................................................... 2-10
External CS/INT/wait............................................................................. 2-10
Power and Ground................................................................................. 2-12
Regulator Interface ................................................................................ 2-12
Miscellaneous ........................................................................................ 2-12
................................................................................................................. 3-1
Frequency ................................................................................................ 3-1
Boot code data-width ............................................................................... 3-1
GMII/MII port.......................................................................................... 3-1
PHY Overview.......................................................................................... 3-2
Link Detect ............................................................................................... 3-2
Auto-Negotiation...................................................................................... 3-2
Digital Adaptive Equalizer ...................................................................... 3-2
Clock Recovery ........................................................................................ 3-3
............................................................................ 2-4
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