Reserved, Offset: 0X34; Reserved, Offset: 0X38 - ADMtek ADM5120 Datasheet

ADM5120
Bits Type Name
6 Reserved
7 RW rev-MII
8 RW TXC_check
10:9 RW Config_early_rdy[
1:0]
15:11 Reserved
17:16 RW LED_flash_time
23:18 dis_uc_pause[5:0] Disable unicast pause frame. Default 00000.
31:24 Reserved

4.4.14 Reserved, offset: 0x34

Bits Type Name
Reserved

4.4.15 Reserved, offset: 0x38

Bits Type Name
Reserved
ADMtek Inc.
Description
bit[4]=1, forced the FC of 10M/100M, forced the RX
FC of giga,
bit[5]=1, forced the TX FC of giga
Not Applicable
0: normal MII mode (default), 1: reversed MII if MII
enable and only in the 10M/100M speed, and only in the
AN monitor disable
reversed MII mode (AN will be off) – drive TXC, RXC,
COL, and CRS
(5120 side) RXC
→
TXC TXC
→
TXD RXD
→
TXE RXDV
→
RXD ← TXD
RXDV ← TXE
COL COL
→
CRS CRS
→
1: enable(if in the dumb mode, set to 1),
check the MII port TXC period, if more than 400us,
then disable MII port
1: disable, check TXC(only for 10/100M)(default)
0: enable check.
Giga Port early preamble configuration. Default value
00
Not Applicable
The frequency of LED flash:
00: 30ms,
01: 60ms,
10: 240ms,
11: 480ms
Not Applicable
Description
Not Applicable
Description
Not Applicable
RXC (MAC side)
Register Description
Initial value
0
1
0
00
Initial value
Initial value
4-12