Clock Recovery; Adm5120; Admtek Inc; Stream Cipher Scrambler/ De-Scrambler - ADMtek ADM5120 Datasheet

ADM5120

interference. The adaptive equalizer function conditions the incoming 100Base-T receive
signal to compensate for this distortion. Transceivers that utilize an analog methodology
to equalize are subject to system noise degrading their performance while a digital
methodology provides better noise immunity but with the tradeoff of high power
consumption. This design uses an optimal combination of analog and digital techniques
resulting in superior performance in signal recovery and with low power consumption.
This equalizer uses forward analog equalization and digital decision feedback
equalization (DFE).
addressed and compensated. This technique enables outstanding performance up to
100meters on CAT 5 twisted pair even in noisy environments. 10Base-T transmission,
utilizes a pre-equalization technique, the adaptive equalizer is bypassed.

3.2.5 Clock Recovery

The clock recovery function is based on Phase Locked Loop (PLL). The clock samples
the equalized signal with a feedback mechanism to shift the sampling point to the
optimum position. This recovered clock is used to synchronize all other functions of the
"Receive" section especially data recovery and data transmittal.

3.2.6 Stream Cipher Scrambler/ De-scrambler

To reduce the radiated emissions on the twisted pair cable, a scrambling function is
implemented to randomize the data. The TX data is combined with an 11bit wide linear
shift register producing a 2047 bit non-repeating sequence.
The de-scrambling function requires that the data is synchronized and aligned. The de-
scrambler monitors the recovered data for a sequence representing idle codes to achieve
synchronization with the transmit shift register. Once the pattern is deciphered, the data
can then be retrieved for further processing.

3.2.7 Encoder/Decoder

To reduce the radiated emissions, ensure bandwidth spread, ensure sufficient signal
transitions for clock recovery, and provide framing for the 100Base-TX mode, the IEEE
802.3 provides for a 4B(4bit data nibble) to 5B (5 bit symbol) conversion. As well, the
MLT-3 line coding was introduced to limit signal transitions and to half peak value per
cycle. Thus significantly reducing the FCC emissions above 30 MHz. Thus the signal is
encoded for transmission along the line and decoded upon when signal reaches
destination.

ADMtek Inc.

Gain, offset, baseline wander, jitter and frequency error are
Function Description
3-3