Gpio_Conf0, Offset 0Xb8; Gpio_Conf2, Offset 0Xbc; Watchdog0, Offset 0Xc0; Watchdog1, Offset 0Xc4 - ADMtek ADM5120 Datasheet

ADM5120

4.4.47 GPIO_conf0, offset 0xB8

Bits Type Name
7:0 RW in_out0
15:8 RO in_value0
23:16 RW out_en0
31:24 RW out_value0

4.4.48 GPIO_conf2, offset 0xBc

Bits Type Name
3:0 Reserved
4 WO en_csx_intx
5 WO en_csx1_intx1
6 WO en_wait
31:7 Reserved

4.4.49 Watchdog0, offset 0xC0

Bits Type Name
14:0 RW Watchdog0_tmr
15 Reserved
30:16 RW Watchdog0_tmr_s
et
31 RW Watchdog0_reset_
en

4.4.50 Watchdog1, offset 0xC4

Bits Type Name
14:0 RW Watchdog1_tmr
15 Reserved
ADMtek Inc.
Description
GPIO[7:0] input or output
GPIO[7:0] input value if in the input mode
GPIO[7:0] output enable if in the output mode
input (default)
GPIO[7:0] output value if in the output mode and
enable
Description
Not Applicable
1: enable wait control, GPIO[0], for the CSX interface
0: disable
Enable CSX1, INTX1 in GPIO[3:4]
Enable CSX, INTX in GPIO[1:2]
Not Applicable
Description
Watchdog timer: count up timer, mask-able, write clear,
unit 10ms. If reach timer set mean time up and keep the
counter until write-clear by software, maximum 327sec.
Not Applicable
Watchdog timer set: the time out setting of timer, if
timer set is equal to timer, then it mean timer is expired.
Maximum 32767
Watchdog timer trigger reset:
0: disable,
1: reset the whole chip, if watchdog timer expired
Description
Watchdog1 timer: Count up timer, mask-able, write
clear, unit 10ms. If reach timer set mean time up and
keep the counter until write-clear by software,
maximum 327sec.
Not Applicable
1: input
→
→
0: disable
→
0: disable
→
Register Description
Initial value
0:
Initial value
Initial value
Initial value
4-22