R8C/1B Group - Renesas R8C Series User Manual

16-bit single-chip microcomputer
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R8C/1A Group, R8C/1B Group
3.2

R8C/1B Group

Figure 3.2 is a Memory Map of R8C/1B Group. The R8C/1B Group has 1 Mbyte of address space from
addresses 00000h to FFFFFh.
The internal ROM (program ROM) is allocated lower addresses, beginning with address 0FFFFh. For
example, a 16-Kbyte internal ROM area is allocated addresses 0C000h to 0FFFFh.
The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting
address of each interrupt routine.
The internal ROM (data flash) is allocated addresses 02400h to 02BFFh.
The internal RAM is allocated higher addresses beginning with address 00400h. For example, a 1-
Kbyte internal RAM area is allocated addresses 00400h to 007FFh. The internal RAM is used not only
for storing data but also for calling subroutines and as stacks when interrupt requests are
acknowledged.
Special function registers (SFRs) are allocated addresses 00000h to 002FFh. The peripheral function
control registers are allocated here. All addresses within the SFR, which have nothing allocated are
reserved for future use and cannot be accessed by users.
00000h
(See 4. Special Function
Registers (SFRs))
002FFh
00400h
0XXXXh
02400h
02BFFh
0YYYYh
0FFFFh
FFFFFh
NOTES:
1. Data flash block A (1 Kbyte) and B (1 Kbyte) are shown.
2. The blank regions are reserved. Do not access locations in these regions.
R5F211B4SP, R5F211B4DSP, R5F211B4DD, R5F211B4NP,
R5F211B4XXXSP, R5F211B4DXXXSP, R5F211B4XXXDD,
R5F211B4XXXNP
R5F211B3SP, R5F211B3DSP, R5F211B3DD, R5F211B3NP,
R5F211B3XXXSP, R5F211B3DXXXSP, R5F211B3XXXDD,
R5F211B3XXXNP
R5F211B2SP, R5F211B2DSP, R5F211B2DD, R5F211B2NP,
R5F211B2XXXSP, R5F211B2DXXXSP, R5F211B2XXXDD,
R5F211B2XXXNP
R5F211B1SP, R5F211B1DSP, R5F211B1DD,
R5F211B1XXXSP, R5F211B1DXXXSP, R5F211B1XXXDD
Figure 3.2
Memory Map of R8C/1B Group
Rev.1.30
Dec 08, 2006
REJ09B0252-0130
SFR
Internal RAM
Internal ROM
(1)
(data Flash)
Internal ROM
(program ROM)
Expanded area
Part Number
Page 19 of 315
0FFDCh
Undefined instruction
BRK instruction
Address match
Watchdog timer • oscillation stop detection • voltage monitor 2
Address break
0FFFFh
Internal ROM
Address
Size
0YYYYh
16 Kbytes
0C000h
12 Kbytes
0D000h
8 Kbytes
0E000h
4 Kbytes
0F000h
Overflow
Single step
(Reserved)
Reset
Internal RAM
Address
Size
0XXXXh
1 Kbyte
007FFh
768 bytes
006FFh
512 bytes
005FFh
384 bytes
0057Fh
3. Memory

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