Rom Code Protect Function - Renesas R8C Series User Manual

R8C/1A Group, R8C/1B Group
18.3.2

ROM Code Protect Function

The ROM code protect function disables reading or changing the contents of the on-chip flash memory by the
OFS register in parallel I/O mode. Figure 18.4 shows the OFS Register.
The ROM code protect function is enabled by writing 0 to the ROMCP1 bit and 1 to the ROMCR bit. It disables
reading or changing the contents of the on-chip flash memory.
Once ROM code protect is enabled, the content in the internal flash memory cannot be rewritten in parallel I/O
mode. To disable ROM code protect, erase the block including the OFS register with CPU rewrite mode or
standard serial I/O mode.
Option Function Select Register
b7 b6 b5 b4 b3 b2 b1 b0
1 1 1 1
NOTES :
1. The OFS register is on the flash memory. Write to the OFS register w ith a program.
2. If the block including the OFS register is erased, FFh is set to the OFS register.
Figure 18.4 OFS Register
Rev.1.30 Dec 08, 2006
REJ09B0252-0130
(1)
Symbol Address
0FFFFh
OFS
Bit Symbol Bit Name
Watchdog timer start
WDTON
select bit
— Reserved bit
(b1)
ROM code protect
ROMCR
disabled bit
ROM code protect bit
ROMCP1
— Reserved bits
(b6-b4)
Count source protect
mode after reset select
CSPROINI
bit
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(2)
FFh
Function
0 : Starts w atchdog timer automatically after reset.
1 : Watchdog timer is inactive after reset.
Set to 1.
0 : ROM code protect disabled
1 : ROMCP1enabled
0 : ROM code protect enabled
1 : ROM code protect disabled
Set to 1.
0 : Count source protect mode enabled after reset.
1 : Count source protect mode disabled after reset.
18. Flash Memory
RW
RW
RW
RW
RW
RW
RW