Agilent Technologies E5052A Programmer's Manual page 488

Signal source analyzer
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Status Reporting System
Status Register Structure
register.
Table B-12
Status Bit Definitions of Questionable Limit PN1 Status Event Register
Issuing the *CLS command will clear all of the bits in the questionable limit PN1 status
event register.
Table B-13
Status Bit Definitions of Questionable Limit SP1 Status Event Register
Issuing the *CLS command will clear all of the bits in the questionable limit SP1 status
event register.
Table B-14
Status Bit Definitions of Questionable Limit FP1 Status Event Register
Issuing the *CLS command will clear all of the bits in the questionable limit FP1 status
488
Bit
Name
Position
0
Not used
1
Trace 1 Limit Test Fail
2-15
Not used
Bit
Name
Position
0
Not used
1
Trace 1 Limit Test Fail
2-15
Not used
Bit
Name
Position
0
Not used
1
Trace 1 Limit Test Fail
2
Trace 2 Limit Test Fail
3
Trace 3 Limit Test Fail
4
Trace 4 Limit Test Fail
5-15
Not used
Description
Always 0.
Set to "0" when a measurement cycle begins;
set to "1" when the measurement cycle finishes and
returns "fail" as the limit test result for trace 1.
Always 0.
Description
Always 0.
Set to "0" when a measurement cycle begins;
set to "1" when the measurement cycle finishes and
returns "fail" as the limit test result for trace 1.
Always 0.
Description
Always 0.
Set to "0" when a measurement cycle begins;
after a measurement cycle bigins, and when "fail" is
returned for trace 1, "1" will be set.
Set to "0" when a measurement cycle begins;
after a measurement cycle bigins, and when "fail" is
returned for trace 2, "1" will be set.
Set to "0" when a measurement cycle begins;
after a measurement cycle bigins, and when "fail" is
returned for trace 3, "1" will be set.
Set to "0" when a measurement cycle begins;
after a measurement cycle bigins, and when "fail" is
returned for trace 4, "1" will be set.
Always 0.
Appendix B

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