Board Components
Expansion
Prototype
Connectors
(PROTO1 &
PROTO2)
2–16
Nios Development Board Cyclone II Edition
Figure 2–5. Serial Connector J19
J19
Table 2–10. Serial Connector Pin Table
FPGA Pin
AB15
3
J22
2
H21
4
K22
1
H19
6
L19
9
L23
8
AC15
7
PROTO1 and PROTO2 are standard-footprint, mechanically-stable
connections that can be used (for example) as an interface to a special-
function daughter card. Headers J11, J12, and J13 collectively form
PROTO1, and J15, J16 and J17 collectively form PROTO2.
The expansion prototype connector interface includes:
■
41 I/O pins for prototyping. All 41 I/O pins connect to user I/O pins
on the FPGA. Each signal passes through analog switches to protect
the FPGA from 5V logic levels. These analog switches are
permanently enabled. The output logic-level on the expansion
prototype connector pins is 3.3V.
PROTO1 switches: U19, U20, U21, U22 and U25
●
PROTO2 switches: U27, U28, U29, U30 and U31
●
Reference Manual
GND
DTR
Function
Direction
5
Connector Pin #
9
Connector Pin #
OUT
Direction
RI
Function
J19 Pin
Board Net Name
serial_rxd
serial_txd
serial_dtr
serial_dcd
serial_dsr
serial_ri
serial_cts
serial_rts
RXD
TXD
DCD
IN
IN
OUT
OUT
3
4
2
1
8
7
6
OUT
IN
OUT
CTS
RTS
DSR
Altera Corporation
May 2007
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