Flash Memory (U5) - Altera Nios Cyclone II Edition Reference Manual

Flash Memory
(U5)
Altera Corporation
May 2007
U5 is an 8-bit, 16 Mbyte AMD flash memory device connected to the
FPGA. Depending on the board revision, the part number is
AM29LV128M or S29GL128M10TFIR1. Refer to
between the FPGA and the flash memory chip. U5 can be used for two
purposes:
1. A Nios II embedded processor implemented on the FPGA can use
the flash memory as general-purpose memory and non-volatile
storage.
2. The flash memory can hold FPGA configuration data that is used by
the configuration controller to load the FPGA at power-up. Refer to
"Configuration Controller Device (U3)" on page 2–33
information.
A Nios II processor design in the FPGA can identify the 16 Mbyte flash
memory in its address space, and can program new data (either new
FPGA configuration data, Nios II software, or both) into flash memory.
The Nios II development software includes subroutines for writing and
erasing flash memory.
1
The flash memory device shares address and data connections
with the Ethernet MAC/PHY device.
Table 2–8. Flash Memory Pin Table
FPGA Pin
F9 51
H8 31
D11 26
E8 25
B14 24
A14 23
F14 22
G14 21
F13 20
G13 10
C15 9
B15 8
B16 7
C16 6
D15 5
Reference Manual
U5 Pin Board Net Name
fe_a0
fe_a1
fe_a2
fe_a3
fe_a4
fe_a5
fe_a6
fe_a7
fe_a8
fe_a9
fe_a10
fe_a11
fe_a12
fe_a13
fe_a14
Nios Development Board Cyclone II Edition
Board Components
Table 2–8 for connections
for related
2–11