Ssram Chip (U74) - Altera Nios Cyclone II Edition Reference Manual

Board Components
SSRAM Chip
(U74)
2–6
Nios Development Board Cyclone II Edition
Table 2–5. Dual Seven-Segment Display
FPGA Pin U8 & U9 Pin
U8
AE13 10
AF13 9
AD12 8
AE12 5
AA12 4
Y12 2
V11 3
U12 7
U9
V14 10
V13 9
AD11 8
AE11 5
AE10 4
AF10 2
AD10 3
AC11 7
U74 is a 32-bit, 2 Mbyte Cypress SSRAM chip. Depending on the board
revision, the part number is CY7C1380C-167AC or CY7C1380D-167AXC.
The chip is rated for synchronous accesses up to 167 MHz. U74 connects
to the FPGA so it can be used by a Nios II embedded processor as general-
purpose memory. The factory-programmed Nios II reference design
identifies the SSRAM devices in its address space as a contiguous 2
Mbyte, 32-bit-wide, zero-wait-state main memory.
Reference Manual
Pin Function Board Net Name
a hex_0A
b hex_0B
c hex_0C
d hex_0D
e hex_0E
f hex_0F
g hex_0G
dp hex_0DP
a hex_1A
b hex_1B
c hex_1C
d hex_1D
e hex_1E
f hex_1F
g hex_1G
dp hex_1DP
Altera Corporation
May 2007