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Chapter 11 Protocol Decoding
TCRC (Tail Cyclic Redundancy Check): expressed in Hex, displayed as a
⚫
yellow-green patch. When CRC errors occur, it is displayed as a red patch.
TSS Sync Frame Frame PL HCRC
I2S Decoding (Option)
The oscilloscope samples the I2S signal and judges each data point as logic "1" or
logic "0" according to the preset threshold level. I2S decoding is required to specify
the serial clock, channel signal, and the data's source channel. You need to set
Alignment, WS Low, and other parameters.
In the decode setting menu, click Decode1 → Bus Type to select "I2S".
1. Enable or disable the bus
Click Bus Status continuously to enable or disable the decoding function.
2. Quickly apply I2S trigger settings to I2S decoding
Click Copy Trig to copy the I2S trigger settings and apply them to I2S decoding
function (set the corresponding I2S decoding parameters automatically).
3. Source Setting
Click Sources to enter the source setting menu.
Set the serial clock channel source, threshold, and clock edge
⚫
Click SCLK to select the desired channel. The available channels
➢
include CH1-CH4.
Click SCLK Thre below SCLK, then use the pop-up numeric keypad or
➢
scroll with the mouse to set the threshold of the SCLK. When you
modify the threshold of the clock channel, a dotted line displaying the
current threshold level is displayed on the screen. The dotted line
disappears in about 2 s after you stop modifying the threshold.
Click SCLK Edge continuously to select "Rising(
➢
as the desired clock edge.
Set the WS source and the threshold
⚫
Click WS to select the desired channel. The available channels include
➢
DS8000-R User Guide
CYC Data
)" or "Falling(
RIGOL
TCRC
)"
11-33
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