Signal Simulation - Siemens TXP-CLC Manual

TXP-CLC Course

Signal Simulation

Irrespective of the input signal present a binary signal can be simulated via the
software using the software simulation feature. The effect on the process image
is the replacement of the process value with the simulation value. The effect on
time-tagged data is the TTD "Channel simulated" or "Channel not simulated"
being generated, in as far as the TTD has been configured for the binary signal.
The effect on internal further processing is that the simulation value is processed
further as if it were the process value. There is no indication on the module that
signal is being simulated. Fault indications for the point will be inactive during
simulation.
To simulate a signal, on an open function plan with a binary input signal block,
select the "BE/SIG" signal definition (SIGDEF) connection with the left mouse
button.
7
Next use the middle mouse button to select the simulation option, and select the
binary value on the pop up window. Click "ok" to enter the value.
Training Center 9
Copying of this document, and giving it to others and use or communication of the contents, are forbidden without express authority. Offenders are liable to the payment of
damages. All rights are reserved in the event of the grant of a patent or the registration of a utility model or design.