Holtek HT66F488 Manual page 92

PTnON: PTMn Counter On/Off Control
Bit 3
0: Off
1: On
This bit controls the overall on/off function of the TM. Setting the bit high enables the
counter to run, clearing the bit disables the TM. Clearing this bit to zero will stop the
counter from counting and turn off the TM which will reduce its power consumption.
When the bit changes state from low to high the internal counter value will be reset to
zero, however when the bit changes from high to low, the internal counter will retain
its residual value until the bit returns high again. If the TM is in the Compare Match
Output Mode then the TM output pin will be reset to its initial condition, as specified
by the PTnOC bit, when the PTnON bit changes from low to high.
Bit 2~0 Unimplemented, read as"0"
PTMnC1 Register
Bit 7
�a�e PTnM1
R/W R/W
POR �
Bit 7~6 PTnM1~PTnM0: Select PTMn Operating Mode
00: Compare Match Output Mode
01: Capture Input Mode
10: PWM Mode or Single Pulse Output Mode
11: Timer/Counter Mode
These bits setup the required operating mode for the TM. To ensure reliable operation
the TM should be switched off before any changes are made to the PTnM1 and
PTnM0 bits. In the Timer/Counter Mode, the TM output pin control must be disabled.
PTnIO1~PTnIO0: Select PTPn output function
Bit 5~4
Compare Match Output Mode
00: No change
01: Output low
10: Output high
11: Toggle output
PWM Mode/Single Pulse Output Mode
00: Force inactive state
01: Force active state
10: PWM output
11: Single pulse output
Capture Input Mode
00: Input capture at rising edge of PTPn or PTCKn
01: Input capture at falling edge of PTPn or PTCKn
10: Input capture at falling/rising edge of PTPn or PTCKn
11: Input capture disabled
Timer/counter Mode
Unused
These two bits are used to determine how the TM output pin changes state when
a certain condition is reached. The function that these bits select depends upon in
which mode the TM is running. In the Compare Match Output Mode, the PTnIO1 and
PTnIO0 bits determine how the TM output pin changes state when a compare match
occurs from the Comparator A. The TM output pin can be setup to switch high, switch
low or to toggle its present state when a compare match occurs from the Comparator A.
When the bits are both zero, then no change will take place on the output. The initial
value of the TM output pin should be setup using the PTnOC bit in the PTMnC1
register. Note that the output level requested by the PTnIO1 and PTnIO0 bits must be
Rev. 1.21
A/D Flash MCU with EEPROM
6 5 4
PTnM� PTnIO1 PTnIO�
R/W R/W R/W
� � �
�2
HT66F488/HT66F489
3 2 1
PTnOC PTnPOL PTnCKS PTnCCLR
R/W R/W R/W
� � �
�ove��e� ��� 2�1�
0
R/W
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