Add�Ess Detect �Ode - Holtek HT66F488 Manual

HT66F488/HT66F489
A/D Flash MCU with EEPROM
USR Register
Transmitter Empty
Flag TXIF
Transmitter Idle
Flag TIDLE
Receiver Overrun
Flag OERR
Receiver Data
Available RXIF
RX Pin
Wake-up
Address detect mode
Setting the Address Detect Mode bit, ADDEN, in the UCR2 register, enables this special mode. If
this bit is enabled then an additional qualifier will be placed on the generation of a Receiver Data
Available interrupt, which is requested by the RXIF flag. If the ADDEN bit is enabled, then when
data is available, an interrupt will only be generated, if the highest received bit has a high value.
Note that the MFE, URE and EMI interrupt enable bits must also be enabled for correct interrupt
generation. This highest address bit is the 9
then the received word will be defined as an address rather than data. A Data Available interrupt will
be generated every time the last bit of the received word is set. If the ADDEN bit is not enabled, then
a Receiver Data Available interrupt will be generated each time the RXIF flag is set, irrespective of
the data last bit status. The address detect mode and parity enable are mutually exclusive functions.
Therefore if the address detect mode is enabled, then to ensure correct operation, the parity function
should be disabled by resetting the parity enable bit to zero.
ADDEN
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1
Rev. 1.21
UCR2 Register
TEIE
TIIE
RIE
OR
ADDEN
0
1
WAKE
0
1
UCR2 Register
UART Interrupt Scheme
bit if BNO=1 or the 8
th
Bit 9 if BNO=1, Bit 8 if BNO=0
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1
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1
ADDEN Bit Function
145
0
1
UART Interrupt
0
Request Flag
To MCU Interrupt
1
UARF
0
1
0
1
RX7 if BNO=0
RX8 if BNO=1
bit if BNO=0. If this bit is high,
th
UART Interrupt Generated
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Controller