Holtek HT66F488 Manual page 107

HT66F488/HT66F489
A/D Flash MCU with EEPROM
ADCR1 Register
Bit
�a�e ACS4
R/W R/W
POR
ACS4: Selecte Internal V
Bit 7
0: Disable
1: Enable
This bit enables V
first have been set to enable the bandgap circuit V
converter. When the ACS4 bit is set high, the bandgap voltage will be routed to the A/
D converter and the other A/D input channels disconnected.
V125EN: Internal V
Bit 6
0: Disable
1: Enable
This bit controls the internal Bandgap circuit on/off function to the A/D converter.
When the bit is set high the bandgap voltage V
If V
bandgap reference circuit will be automatically switched off to conserve power. When
V
BG
bandgap circuit to stabilise before implementing an A/D conversion.
Bit 5~4 Unimplemented, read as "0"
Bit 3 VREFS: Selecte ADC reference voltage
0: Internal ADC power AV
1: VREF pin
This bit is used to select the reference voltage for the A/D converter. If the bit is 1 then
the A/D converter reference voltage is supplied on the external pin VREF. If the pin is
0 then the internal reference is used which is taken from the power supply pin AVDD.
When the A/D converter reference voltage is supplied on the external pin VREF which
is pin-shared with other functions, all of the other pin-shared functions on this pin are
disabled.
Bit 2 ~ 0 ADCK2 ~ ADCK0: Select ADC clock source
000: f
001: f
010: f
011: f
100: f
101: f
110: f
111: Undefined
These three bits are used to select the clock source for the A/D converter.
Rev. 1.21
7 6 5
V125E� —
R/W —
� � —
as ADC input Control
BG
to be connected to the A/D converter. The V125EN bit must
BG
Control
BG
is not used by the A/D converter and the LVR function is disabled then the
BG
is switched on for use by the A/D converter, a time t
DD
SYS
/2
SYS
/4
SYS
/8
SYS
/16
SYS
/32
SYS
/64
SYS
1��
4 3 2
— VREFS ADCK2 ADCK1
— R/W R/W
— � �
voltage to be used by the A/D
BG
can be used by the A/D converter.
BG
should be allowed for the
BG
�ove��e� ��� 2�1�
1 0
ADCK�
R/W R/W
� �