Exte�Nal Inte - Holtek HT66F488 Manual

HT66F488/HT66F489
A/D Flash MCU with EEPROM
Legend
xxF Request Flag, no auto reset in ISR
xxF Request Flag, auto reset in ISR
xxE Enable Bits
CTMP CTMPF
CTMA CTMAF
LVD
STMP STMPF
STMA STMAF
PTM0P PTM0PF
PTM0A PTM0AF
PTM1P PTM1PF
PTM1A PTM1AF
Interrupts contained within
Multi-Function Interrupts
External Interrupt
The external interrupt is controlled by signal transitions on the pins INT0~INT5. An external
interrupt request will take place when the external interrupt request flag, INTnF, is set, which
will occur when a transition, whose type is chosen by the edge select bits, appears on the external
interrupt pin. To allow the program to branch to the interrupt vector address, the global interrupt
enable bit, EMI, and the external interrupt enable bit, INTnE, must first be set. Additionally the
correct interrupt edge type must be selected using the INTEGn register to enable the external
interrupt function and to choose the trigger edge type. As the external interrupt pin is pin-shared
with an I/O pin, it can only be configured as external interrupt pin if its external interrupt enable bit
in the corresponding interrupt register has been set. The pin must also be setup as an input by setting
the corresponding bit in the port control register. When the interrupt is enabled, the stack is not full
and the correct transition type appears on the external interrupt pin, a subroutine call to the external
interrupt vector, will take place. When the interrupt is serviced, the external interrupt request flag,
INTnF, will be automatically reset and the EMI bit will be automatically cleared to disable other
interrupts. Note that the pull-high resistor selection on the external interrupt pin will remain valid
even if the pin is used as an external interrupt input.
The INTEG0~INTEG1 registers are used to select the type of active edge that will trigger the
external interrupt. A choice of either rising or falling or both edge types can be chosen to trigger an
external interrupt. Note that the INTEG0~INTEG1 registers can also be used to disable the external
interrupt function.
Rev. 1.21
Interrupt
Name
INT0 Pin
INT1 Pin
INT2 Pin
INT3 Pin
INT4 Pin
INT5 Pin
UART
CTMPE
CTMAE
M. Funct. 0
LVF LVE
STMPE M. Funct. 1
STMAE
PTM0PE
M. Funct. 2
PTM0AE
A/D
PTM1PE
Time Base 0
PTM1AE
Time Base 1
EEPROM
SIM
Interrupt Structure
155
EMI auto disabled in ISR
Request Enable Master
Flags Bits Enable
INT0F INT0E EMI
INT1F INT1E EMI
INT2F INT2E EMI
INT3F INT3E EMI
INT4F INT4E EMI
INT5F INT5E EMI
UARF UARE EMI
MF0F MF0E EMI
MF1F MF1E EMI
MF2F MF2E EMI
ADF ADE EMI
TB0F TB0E EMI
TB1F TB1E EMI
DEF DEE EMI
SIMF SIME EMI
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Priority
Vector
High
04H
08H
0CH
10H
14H
18H
1CH
20H
24H
28H
2CH
30H
34H
38H
Low
3CH