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Bit
7
6
5
Bit
7:0
Bit
7:0
68
GFK-2896
For public disclosure
6.9.2 Control
2
The I
C run-time Control register is used to enable and disable the core, and to enable and
mask its interrupt.
I
2
C Control Register (Offset 0x2)
Name
Access
Default
EN
R/W
IEN
R/W
—
R
0b000000
6.9.3 Transmit
The I
2
C Transmit register is used to write the data and address/control bytes to be sent on
the I
2
C bus. It can be written at address offset 0x3 and read back at offset 0x5.
I
2
C Transmit Register (Offset 0x3/0x5)
Name
Access
Default
TX
R/W
6.9.4 Receive
The I
2
C Receive register is used to retrieve the data bytes received from the I
2
I
C Receive Register (Offset 0x3)
Name
Access
Default
RX
R
Description
Controller core enable
0
0: I2C controller is disabled
1: I2C controller is enabled
Interrupt enable
0: External interrupt is disabled
(masked)
0
1: External interrupt is enabled
(unmasked)
Reserved
Description
Data or address/control byte to
0x00
be transmitted on the I
Description
0x00
Data received from the I
Mini COM Express Type 10 Module mCOM10-L1500
2
C bus
2
C bus.
2
C bus
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