Bit
Name
VREG_RST
7
WDOG_RST
6
—
5
DB_RST
4
—
3
PB_RST
2
1
OVERTEMP
0
POR
66
GFK-2896
For public disclosure
6.8.2 Last Reset
The Last Reset register is similar to the Reset Cause register, but it only indicates the
most recent reset event.
Note This register cannot detect software-controlled hard or soft resets issued by the
SoC.
Last Reset Register (Offset 0x1)
Access
Default
When set, indicates that a CPU power supply regulator
under-voltage caused the last board reset. Cleared by
R/C
0
writing a 1 to the bit.
When set, indicates that a watchdog timeout caused the
R/C
0
last board reset. Cleared by writing a 1 to the bit.
R
0
Reserved
When set, indicates that a debug port reset caused the
R/C
0
last board reset. Cleared by writing a 1 to the bit.
R
0
Reserved
When set, indicates that a push-button reset caused the
R/C
0
last board reset. Cleared by writing a 1 to the bit.
When set, indicates that a processor over-temperature
R/C
0
alarm caused the last board reset. Cleared by writing a 1
to the bit.
When set, indicates that a power-on reset caused the
R/C
1
last board reset. Cleared by writing a 1 to the bit.
Description
Mini COM Express Type 10 Module mCOM10-L1500
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