Scratchpad; Divisor Latch - GE Mini COM Express 10 Hardware Reference Manual

Bit
7:0
Bit
7:0
Bit
7:0
64 GFK-2896
For public disclosure

6.7.10 Scratchpad

This register is an 8-bit read/write register for scratchpad data or test purposes. Writes
have no impact on the operation of the UART. When the UART is configured for
extended FIFO size (FIFO_SIZE ≠ 0b00) and FIFO mode is enabled, this register
provides a secondary function: it indicates the actual number of bytes in the receive FIFO
when a timeout interrupt is generated.
UART Scratchpad Register (Offset 0x7)
Name Access
SCRATCH R/W

6.7.11 Divisor Latch

The UART contains a programmable baud-rate generator to divide the 33.33 MHz
reference clock down to the serial data rate. The divisor is a 16-bit value contained in two
byte-wide registers, one for the MSB and one for the LSB. For asynchronous mode, the
clock is set to 16× the bit rate.
UART Divisor (LSB) Register (Offset 0x0, DLAB=1)
Name Access
DIV[7:0]
R/W
UART Divisor (MSB) Register (Offset 0x1, DLAB=1)
Name Access
DIV[15:8]
R/W
The following table provides the divisor values for some common serial data rates.
Baud-Rate Divisor Settings
Baud Rate
300
1200
2400
9600
19200
38400
57600
115.2 k
230.4 k
Description
Default
Scratchpad data / number of bytes in
0x00
receive FIFO
Default
LSB of baud-rate generator divisor
0x00
Default
MSB of baud-rate generator divisor
0x00
Pre-Divide
Divisor
Disable
0 384
0 96
0 48
0 12
0 6
0 3
0 2
0 1
1 9
Mini COM Express Type 10 Module mCOM10-L1500
Description
Description