Line Status - GE Mini COM Express 10 Hardware Reference Manual

Bit Name
ERR_INF
7
6 TEMPT
5 THRE
4
3
2
1
0
62 GFK-2896
For public disclosure

6.7.8 Line Status

This register provides access to status indicators on the UART line interface.
UART Line Status Register (Offset 0x5)
Access Default
R
R
R
BI R
FE R
PE R
OE R
DR R
Description
Error in FIFO. Always cleared in register mode. In
FIFO mode, this bit indicates that at least one
parity error, framing error, or break indication has
0
been received and is inside the receive FIFO.
Cleared on read if no more errors reside in the
FIFO.
Transmitter empty. Set to 1 when both the
transmit holding register and the transmit shift
register are empty. In FIFO mode, this bit
1
indicates that both the transmit FIFO and the
transmit shift register are empty.
Transmit holding register empty. Set to 1 to
indicate that the transmit holding register is ready
1
to accept a new character. In FIFO mode, this bit
indicates that the entire transmit FIFO is empty.
Break indicator. Set to 1 when the receive data is
held at logic 0 for at least one full character (start
bit + data + parity + stop bit) time. In FIFO mode,
0
this applies to the character at the top of the FIFO.
Generates a Receiver Line Status interrupt.
Cleared when read.
Framing error. Set to 1 when the received
character does not have a valid stop bit. In FIFO
mode, this applies to the character at the top of
0
the FIFO. Generates a Receiver Line Status
interrupt. Cleared when read.
Parity error. Set to 1 when the received character
has incorrect parity. In FIFO mode, this applies to
0 the character at the top of the FIFO. Generates a
Receiver Line Status interrupt. Cleared when
read.
Overrun error. Set to 1 when a new receive
character is transferred to the transmit holding
register before the prior character was read, or
0 that the FIFO is full and a complete new character
is received in the shift register. Generates a
Receiver Line Status interrupt. Cleared when
read.
Data ready. Set to 1 when a complete incoming
character has been received and transferred to
the receive data buffer or receive FIFO. Cleared
0
on a read from the receive buffer register, or when
the FIFO is empty.
Mini COM Express Type 10 Module mCOM10-L1500