Table of Contents
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2
I
C Slave Devices 42
SMBus Slave devices 42
Specifications
Standards 73
Standby (VCC_5V_SBY) 29
Startup 19
Initial 22
Required materials 19
Status 70
Supervision Base Address 51
Supervision Configuration Registers 51
Supervision Control 51
Supervision Reset
Power Reset Sequence 29
System Architecture 23
System Management Bus (SMBus) 26
T
Thermal Management 29
Transmit 68
Transmit Buffer 56
U
UART Base Address 48
UART Configuration Registers 48
UART Control 48
UART IRQ 49
UART Mode 50
UART Run-Time Registers 56
UEFI Firmware Setup 22
Unpacking and Inspecting
Damage 16
Unpacking and Inspection 15
USB
Port assignments 25
V
Version 46
Video Monitor 19
Video outputs 24
W
Watchdog Timer (WDT)
FPGA 28
Watchdog Timer Base Address 54
Watchdog Timer Configuration Registers 54
Watchdog Timer Control 54
Watchdog Timer IRQ 55
Watchdog Timer Options 55
Watchdog Timer Run-Time Registers 71
GFK-2896
For public disclosure
Index
79
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